From: tip-bot for Kan Liang <tipbot@zytor.com>
To: linux-tip-commits@vger.kernel.org
Cc: peterz@infradead.org, acme@redhat.com, jolsa@redhat.com,
kan.liang@linux.intel.com, mingo@kernel.org,
linux-kernel@vger.kernel.org, eranian@google.com,
tglx@linutronix.de, vincent.weaver@maine.edu,
alexander.shishkin@linux.intel.com,
torvalds@linux-foundation.org, hpa@zytor.com
Subject: [tip:perf/urgent] perf/x86/regs: Check reserved bits
Date: Tue, 25 Jun 2019 01:20:44 -0700 [thread overview]
Message-ID: <tip-90d424915ab6550826d297fd62df8ee255345b95@git.kernel.org> (raw)
In-Reply-To: <1559081314-9714-2-git-send-email-kan.liang@linux.intel.com>
Commit-ID: 90d424915ab6550826d297fd62df8ee255345b95
Gitweb: https://git.kernel.org/tip/90d424915ab6550826d297fd62df8ee255345b95
Author: Kan Liang <kan.liang@linux.intel.com>
AuthorDate: Tue, 28 May 2019 15:08:31 -0700
Committer: Ingo Molnar <mingo@kernel.org>
CommitDate: Mon, 24 Jun 2019 19:19:24 +0200
perf/x86/regs: Check reserved bits
The perf fuzzer triggers a warning which map to:
if (WARN_ON_ONCE(idx >= ARRAY_SIZE(pt_regs_offset)))
return 0;
The bits between XMM registers and generic registers are reserved.
But perf_reg_validate() doesn't check these bits.
Add PERF_REG_X86_RESERVED for reserved bits on X86.
Check the reserved bits in perf_reg_validate().
Reported-by: Vince Weaver <vincent.weaver@maine.edu>
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Fixes: 878068ea270e ("perf/x86: Support outputting XMM registers")
Link: https://lkml.kernel.org/r/1559081314-9714-2-git-send-email-kan.liang@linux.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
arch/x86/kernel/perf_regs.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/perf_regs.c b/arch/x86/kernel/perf_regs.c
index 07c30ee17425..bb7e1132290b 100644
--- a/arch/x86/kernel/perf_regs.c
+++ b/arch/x86/kernel/perf_regs.c
@@ -74,6 +74,9 @@ u64 perf_reg_value(struct pt_regs *regs, int idx)
return regs_get_register(regs, pt_regs_offset[idx]);
}
+#define PERF_REG_X86_RESERVED (((1ULL << PERF_REG_X86_XMM0) - 1) & \
+ ~((1ULL << PERF_REG_X86_MAX) - 1))
+
#ifdef CONFIG_X86_32
#define REG_NOSUPPORT ((1ULL << PERF_REG_X86_R8) | \
(1ULL << PERF_REG_X86_R9) | \
@@ -86,7 +89,7 @@ u64 perf_reg_value(struct pt_regs *regs, int idx)
int perf_reg_validate(u64 mask)
{
- if (!mask || (mask & REG_NOSUPPORT))
+ if (!mask || (mask & (REG_NOSUPPORT | PERF_REG_X86_RESERVED)))
return -EINVAL;
return 0;
@@ -112,7 +115,7 @@ void perf_get_regs_user(struct perf_regs *regs_user,
int perf_reg_validate(u64 mask)
{
- if (!mask || (mask & REG_NOSUPPORT))
+ if (!mask || (mask & (REG_NOSUPPORT | PERF_REG_X86_RESERVED)))
return -EINVAL;
return 0;
next prev parent reply other threads:[~2019-06-25 8:22 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-28 22:08 [PATCH V3 1/5] perf: Disable extended registers for non-support PMUs kan.liang
2019-05-28 22:08 ` [PATCH V3 2/5] perf/x86/regs: Check reserved bits kan.liang
2019-06-25 8:20 ` tip-bot for Kan Liang [this message]
2019-05-28 22:08 ` [PATCH V3 3/5] perf/x86: Clean up PEBS_XMM_REGS kan.liang
2019-06-25 8:21 ` [tip:perf/urgent] " tip-bot for Kan Liang
2019-05-28 22:08 ` [PATCH V3 4/5] perf/x86: Clean up pebs_no_xmm_regs kan.liang
2019-06-25 8:22 ` [tip:perf/urgent] perf/x86: Remove pmu->pebs_no_xmm_regs tip-bot for Kan Liang
2019-05-28 22:08 ` [PATCH V3 5/5] perf regs x86: Use PERF_REG_EXTENDED_MASK kan.liang
2019-06-25 8:22 ` [tip:perf/urgent] perf/x86/regs: " tip-bot for Kan Liang
2019-06-20 12:24 ` [PATCH V3 1/5] perf: Disable extended registers for non-support PMUs Peter Zijlstra
2019-06-25 8:19 ` [tip:perf/urgent] perf/x86: Disable extended registers for non-supported PMUs tip-bot for Kan Liang
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