[tip:perf/core] perf intel-pt: Always set no branch for dummy event

[tip-bot for Kan Liang <tipbot@zytor.com>]

Commit-ID:  91a8c5b840f2da31280e14b6268761cf14033756
Gitweb:     http://git.kernel.org/tip/91a8c5b840f2da31280e14b6268761cf14033756
Author:     Kan Liang <kan.liang@intel.com>
AuthorDate: Fri, 30 Jun 2017 10:16:56 -0400
Committer:  Arnaldo Carvalho de Melo <acme@redhat.com>
CommitDate: Thu, 20 Jul 2017 09:55:51 -0300

perf intel-pt: Always set no branch for dummy event

An earlier kernel patch allowed enabling PT and LBR at the same time on
Goldmont.

commit ccbebba4c6bf ("perf/x86/intel/pt: Bypass PT vs. LBR exclusivity
if the core supports it")

However, users still cannot use Intel PT and LBRs simultaneously.  $
sudo perf record -e cycles,intel_pt//u -b  -- sleep 1 Error: PMU
Hardware doesn't support sampling/overflow-interrupts.

PT implicitly adds dummy event in perf tool. dummy event is software
event which doesn't support LBR.

Always setting no branch for dummy event in Intel PT.

Signed-off-by: Kan Liang <kan.liang@intel.com>
Acked-by: Jiri Olsa <jolsa@redhat.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/r/20170630141656.1626-2-kan.liang@intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
---
 tools/perf/arch/x86/util/intel-pt.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/tools/perf/arch/x86/util/intel-pt.c b/tools/perf/arch/x86/util/intel-pt.c
index 4a461e8..db0ba8c 100644
--- a/tools/perf/arch/x86/util/intel-pt.c
+++ b/tools/perf/arch/x86/util/intel-pt.c
@@ -701,6 +701,7 @@ static int intel_pt_recording_options(struct auxtrace_record *itr,
 				perf_evsel__set_sample_bit(switch_evsel, TID);
 				perf_evsel__set_sample_bit(switch_evsel, TIME);
 				perf_evsel__set_sample_bit(switch_evsel, CPU);
+				perf_evsel__reset_sample_bit(switch_evsel, BRANCH_STACK);
 
 				opts->record_switch_events = false;
 				ptr->have_sched_switch = 3;
@@ -762,6 +763,7 @@ static int intel_pt_recording_options(struct auxtrace_record *itr,
 			/* And the CPU for switch events */
 			perf_evsel__set_sample_bit(tracking_evsel, CPU);
 		}
+		perf_evsel__reset_sample_bit(tracking_evsel, BRANCH_STACK);
 	}
 
 	/*