From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757715AbdJPVUD (ORCPT ); Mon, 16 Oct 2017 17:20:03 -0400 Received: from terminus.zytor.com ([65.50.211.136]:44469 "EHLO terminus.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757698AbdJPVUA (ORCPT ); Mon, 16 Oct 2017 17:20:00 -0400 Date: Mon, 16 Oct 2017 14:16:20 -0700 From: "tip-bot for mike.travis@hpe.com" Message-ID: Cc: hpa@zytor.com, tglx@linutronix.de, andrew.banman@hpe.com, russ.anderson@hpe.com, prarit@redhat.com, dimitri.sivanich@hpe.com, peterz@infradead.org, bin.gao@linux.intel.com, mike.travis@hpe.com, linux-kernel@vger.kernel.org, mingo@kernel.org Reply-To: prarit@redhat.com, russ.anderson@hpe.com, peterz@infradead.org, dimitri.sivanich@hpe.com, hpa@zytor.com, andrew.banman@hpe.com, tglx@linutronix.de, mingo@kernel.org, linux-kernel@vger.kernel.org, mike.travis@hpe.com, bin.gao@linux.intel.com In-Reply-To: <20171012163202.060777495@stormcage.americas.sgi.com> References: <20171012163202.060777495@stormcage.americas.sgi.com> To: linux-tip-commits@vger.kernel.org Subject: [tip:x86/timers] x86/tsc: Skip TSC test and error messages if already unstable Git-Commit-ID: 9514ececa52e9f1436e7682e98c852d1338b699f X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Commit-ID: 9514ececa52e9f1436e7682e98c852d1338b699f Gitweb: https://git.kernel.org/tip/9514ececa52e9f1436e7682e98c852d1338b699f Author: mike.travis@hpe.com AuthorDate: Thu, 12 Oct 2017 11:32:03 -0500 Committer: Thomas Gleixner CommitDate: Mon, 16 Oct 2017 22:50:36 +0200 x86/tsc: Skip TSC test and error messages if already unstable If the TSC has already been determined to be unstable, then checking TSC ADJUST values is a waste of time and generates unnecessary error messages. Signed-off-by: Mike Travis Signed-off-by: Thomas Gleixner Reviewed-by: Dimitri Sivanich Reviewed-by: Russ Anderson Reviewed-by: Peter Zijlstra Cc: Prarit Bhargava Cc: Andrew Banman Cc: Bin Gao Link: https://lkml.kernel.org/r/20171012163202.060777495@stormcage.americas.sgi.com --- arch/x86/kernel/tsc_sync.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/x86/kernel/tsc_sync.c b/arch/x86/kernel/tsc_sync.c index 3873dcd..3bdb983 100644 --- a/arch/x86/kernel/tsc_sync.c +++ b/arch/x86/kernel/tsc_sync.c @@ -52,6 +52,10 @@ void tsc_verify_tsc_adjust(bool resume) if (!boot_cpu_has(X86_FEATURE_TSC_ADJUST)) return; + /* Skip unnecessary error messages if TSC already unstable */ + if (check_tsc_unstable()) + return; + /* Rate limit the MSR check */ if (!resume && time_before(jiffies, adj->nextcheck)) return; @@ -114,6 +118,10 @@ bool __init tsc_store_and_check_tsc_adjust(bool bootcpu) if (!boot_cpu_has(X86_FEATURE_TSC_ADJUST)) return false; + /* Skip unnecessary error messages if TSC already unstable */ + if (check_tsc_unstable()) + return false; + rdmsrl(MSR_IA32_TSC_ADJUST, bootval); cur->bootval = bootval; cur->nextcheck = jiffies + HZ;