From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752812AbcAFSzT (ORCPT ); Wed, 6 Jan 2016 13:55:19 -0500 Received: from terminus.zytor.com ([198.137.202.10]:54930 "EHLO terminus.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752152AbcAFSzP (ORCPT ); Wed, 6 Jan 2016 13:55:15 -0500 Date: Wed, 6 Jan 2016 10:54:34 -0800 From: tip-bot for Vince Weaver Message-ID: Cc: acme@redhat.com, linux-kernel@vger.kernel.org, peterz@infradead.org, jolsa@redhat.com, vincent.weaver@maine.edu, torvalds@linux-foundation.org, hpa@zytor.com, mingo@kernel.org, eranian@google.com, tglx@linutronix.de Reply-To: linux-kernel@vger.kernel.org, acme@redhat.com, peterz@infradead.org, jolsa@redhat.com, vincent.weaver@maine.edu, mingo@kernel.org, torvalds@linux-foundation.org, hpa@zytor.com, tglx@linutronix.de, eranian@google.com In-Reply-To: References: To: linux-tip-commits@vger.kernel.org Subject: [tip:perf/core] perf/x86/amd: Remove l1-dcache-stores event for AMD Git-Commit-ID: 9cc2617de5b9222abb39cd02e90d57dfea99c6d7 X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Commit-ID: 9cc2617de5b9222abb39cd02e90d57dfea99c6d7 Gitweb: http://git.kernel.org/tip/9cc2617de5b9222abb39cd02e90d57dfea99c6d7 Author: Vince Weaver AuthorDate: Wed, 9 Dec 2015 11:34:45 -0500 Committer: Ingo Molnar CommitDate: Wed, 6 Jan 2016 11:15:39 +0100 perf/x86/amd: Remove l1-dcache-stores event for AMD This is a long standing bug with the l1-dcache-stores generic event on AMD machines. My perf_event testsuite has been complaining about this for years and I'm finally getting around to trying to get it fixed. The data_cache_refills:system event does not make sense for l1-dcache-stores. Maybe this was a typo and it was meant to be for l1-dcache-store-misses? In any case, the values returned are nowhere near correct for l1-dcache-stores and in fact the umask values for the event have completely changed with fam15h so it makes even less sense than ever. So just remove it. Signed-off-by: Vince Weaver Signed-off-by: Peter Zijlstra (Intel) Cc: Arnaldo Carvalho de Melo Cc: Jiri Olsa Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Stephane Eranian Cc: Thomas Gleixner Link: http://lkml.kernel.org/r/alpine.DEB.2.20.1512091134350.24311@vincent-weaver-1.umelst.maine.edu Signed-off-by: Ingo Molnar --- arch/x86/kernel/cpu/perf_event_amd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/perf_event_amd.c b/arch/x86/kernel/cpu/perf_event_amd.c index 1cee5d2..05e76bf 100644 --- a/arch/x86/kernel/cpu/perf_event_amd.c +++ b/arch/x86/kernel/cpu/perf_event_amd.c @@ -18,7 +18,7 @@ static __initconst const u64 amd_hw_cache_event_ids [ C(RESULT_MISS) ] = 0x0141, /* Data Cache Misses */ }, [ C(OP_WRITE) ] = { - [ C(RESULT_ACCESS) ] = 0x0142, /* Data Cache Refills :system */ + [ C(RESULT_ACCESS) ] = 0, [ C(RESULT_MISS) ] = 0, }, [ C(OP_PREFETCH) ] = {