From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752140AbdFNJVS (ORCPT ); Wed, 14 Jun 2017 05:21:18 -0400 Received: from terminus.zytor.com ([65.50.211.136]:38321 "EHLO terminus.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752075AbdFNJVM (ORCPT ); Wed, 14 Jun 2017 05:21:12 -0400 Date: Wed, 14 Jun 2017 02:16:21 -0700 From: tip-bot for Yazen Ghannam Message-ID: Cc: torvalds@linux-foundation.org, linux-edac@vger.kernel.org, bp@alien8.de, hpa@zytor.com, linux-kernel@vger.kernel.org, bp@suse.de, yazen.ghannam@amd.com, peterz@infradead.org, tglx@linutronix.de, tony.luck@intel.com, mingo@kernel.org Reply-To: yazen.ghannam@amd.com, peterz@infradead.org, tglx@linutronix.de, tony.luck@intel.com, mingo@kernel.org, torvalds@linux-foundation.org, linux-edac@vger.kernel.org, bp@alien8.de, hpa@zytor.com, linux-kernel@vger.kernel.org, bp@suse.de In-Reply-To: <20170613162835.30750-2-bp@alien8.de> References: <20170613162835.30750-2-bp@alien8.de> To: linux-tip-commits@vger.kernel.org Subject: [tip:ras/core] x86/mce/AMD: Use msr_stat when clearing MCA_STATUS Git-Commit-ID: a24b8c3409935bbc8e3c12131c473c92692403cd X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Commit-ID: a24b8c3409935bbc8e3c12131c473c92692403cd Gitweb: http://git.kernel.org/tip/a24b8c3409935bbc8e3c12131c473c92692403cd Author: Yazen Ghannam AuthorDate: Tue, 13 Jun 2017 18:28:28 +0200 Committer: Ingo Molnar CommitDate: Wed, 14 Jun 2017 07:32:06 +0200 x86/mce/AMD: Use msr_stat when clearing MCA_STATUS The value of MCA_STATUS is used as the MSR when clearing MCA_STATUS. This may cause the following warning: unchecked MSR access error: WRMSR to 0x11b (tried to write 0x0000000000000000) Call Trace: smp_threshold_interrupt() threshold_interrupt() Use msr_stat instead which has the MSR address. Signed-off-by: Yazen Ghannam Signed-off-by: Borislav Petkov Cc: Borislav Petkov Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Thomas Gleixner Cc: Tony Luck Cc: linux-edac Fixes: 37d43acfd79f ("x86/mce/AMD: Redo error logging from APIC LVT interrupt handlers") Link: http://lkml.kernel.org/r/20170613162835.30750-2-bp@alien8.de Signed-off-by: Ingo Molnar --- arch/x86/kernel/cpu/mcheck/mce_amd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c index d00f299..d11f94e 100644 --- a/arch/x86/kernel/cpu/mcheck/mce_amd.c +++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c @@ -815,7 +815,7 @@ _log_error_bank(unsigned int bank, u32 msr_stat, u32 msr_addr, u64 misc) __log_error(bank, status, addr, misc); - wrmsrl(status, 0); + wrmsrl(msr_stat, 0); return status & MCI_STATUS_DEFERRED; }