From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752527AbdHJMH0 (ORCPT ); Thu, 10 Aug 2017 08:07:26 -0400 Received: from terminus.zytor.com ([65.50.211.136]:55159 "EHLO terminus.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752478AbdHJMHY (ORCPT ); Thu, 10 Aug 2017 08:07:24 -0400 Date: Thu, 10 Aug 2017 05:02:57 -0700 From: tip-bot for Janakarajan Natarajan Message-ID: Cc: tglx@linutronix.de, hpa@zytor.com, suravee.suthikulpanit@amd.com, Janakarajan.Natarajan@amd.com, alexander.shishkin@linux.intel.com, torvalds@linux-foundation.org, mingo@kernel.org, acme@kernel.org, bp@suse.de, linux-kernel@vger.kernel.org, peterz@infradead.org Reply-To: Janakarajan.Natarajan@amd.com, suravee.suthikulpanit@amd.com, alexander.shishkin@linux.intel.com, hpa@zytor.com, tglx@linutronix.de, mingo@kernel.org, torvalds@linux-foundation.org, linux-kernel@vger.kernel.org, bp@suse.de, acme@kernel.org, peterz@infradead.org In-Reply-To: <5ab569025b39cdfaeca55b571d78c0fc800bdb69.1497452002.git.Janakarajan.Natarajan@amd.com> References: <5ab569025b39cdfaeca55b571d78c0fc800bdb69.1497452002.git.Janakarajan.Natarajan@amd.com> To: linux-tip-commits@vger.kernel.org Subject: [tip:perf/core] perf/x86/amd/uncore: Get correct number of cores sharing last level cache Git-Commit-ID: ab027620e95987b5f0145013090a109b4152d23b X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Commit-ID: ab027620e95987b5f0145013090a109b4152d23b Gitweb: http://git.kernel.org/tip/ab027620e95987b5f0145013090a109b4152d23b Author: Janakarajan Natarajan AuthorDate: Wed, 14 Jun 2017 11:26:58 -0500 Committer: Ingo Molnar CommitDate: Thu, 10 Aug 2017 12:08:39 +0200 perf/x86/amd/uncore: Get correct number of cores sharing last level cache In Family 17h, the number of cores sharing a cache level is obtained from the Cache Properties CPUID leaf (0x8000001d) by passing in the cache level in ECX. In prior families, a cache level of 2 was used to determine this information. To get the right information, irrespective of Family, iterate over the cache levels using CPUID 0x8000001d. The last level cache is the last value to return a non-zero value in EAX. Signed-off-by: Janakarajan Natarajan Signed-off-by: Peter Zijlstra (Intel) Reviewed-by: Borislav Petkov Cc: Alexander Shishkin Cc: Arnaldo Carvalho de Melo Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Suravee Suthikulpanit Cc: Thomas Gleixner Link: http://lkml.kernel.org/r/5ab569025b39cdfaeca55b571d78c0fc800bdb69.1497452002.git.Janakarajan.Natarajan@amd.com Signed-off-by: Ingo Molnar --- arch/x86/events/amd/uncore.c | 19 ++++++++++++++++--- 1 file changed, 16 insertions(+), 3 deletions(-) diff --git a/arch/x86/events/amd/uncore.c b/arch/x86/events/amd/uncore.c index e34f8a6..f5cbbba 100644 --- a/arch/x86/events/amd/uncore.c +++ b/arch/x86/events/amd/uncore.c @@ -400,11 +400,24 @@ static int amd_uncore_cpu_starting(unsigned int cpu) if (amd_uncore_llc) { unsigned int apicid = cpu_data(cpu).apicid; - unsigned int nshared; + unsigned int nshared, subleaf, prev_eax = 0; uncore = *per_cpu_ptr(amd_uncore_llc, cpu); - cpuid_count(0x8000001d, 2, &eax, &ebx, &ecx, &edx); - nshared = ((eax >> 14) & 0xfff) + 1; + /* + * Iterate over Cache Topology Definition leaves until no + * more cache descriptions are available. + */ + for (subleaf = 0; subleaf < 5; subleaf++) { + cpuid_count(0x8000001d, subleaf, &eax, &ebx, &ecx, &edx); + + /* EAX[0:4] gives type of cache */ + if (!(eax & 0x1f)) + break; + + prev_eax = eax; + } + nshared = ((prev_eax >> 14) & 0xfff) + 1; + uncore->id = apicid - (apicid % nshared); uncore = amd_uncore_find_online_sibling(uncore, amd_uncore_llc);