From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755561AbeCHJ0B (ORCPT ); Thu, 8 Mar 2018 04:26:01 -0500 Received: from terminus.zytor.com ([198.137.202.136]:49345 "EHLO terminus.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754883AbeCHJZ7 (ORCPT ); Thu, 8 Mar 2018 04:25:59 -0500 Date: Thu, 8 Mar 2018 01:25:47 -0800 From: tip-bot for Ashok Raj Message-ID: Cc: bp@suse.de, ashok.raj@intel.com, arjan.van.de.ven@intel.com, hpa@zytor.com, mingo@kernel.org, thomas.lendacky@amd.com, tglx@linutronix.de, linux-kernel@vger.kernel.org Reply-To: linux-kernel@vger.kernel.org, tglx@linutronix.de, thomas.lendacky@amd.com, mingo@kernel.org, hpa@zytor.com, arjan.van.de.ven@intel.com, bp@suse.de, ashok.raj@intel.com In-Reply-To: <20180228102846.13447-3-bp@alien8.de> References: <1519352533-15992-2-git-send-email-ashok.raj@intel.com> <20180228102846.13447-3-bp@alien8.de> To: linux-tip-commits@vger.kernel.org Subject: [tip:x86/pti] x86/microcode/intel: Check microcode revision before updating sibling threads Git-Commit-ID: c182d2b7d0ca48e0d6ff16f7d883161238c447ed X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Commit-ID: c182d2b7d0ca48e0d6ff16f7d883161238c447ed Gitweb: https://git.kernel.org/tip/c182d2b7d0ca48e0d6ff16f7d883161238c447ed Author: Ashok Raj AuthorDate: Wed, 28 Feb 2018 11:28:41 +0100 Committer: Thomas Gleixner CommitDate: Thu, 8 Mar 2018 10:19:25 +0100 x86/microcode/intel: Check microcode revision before updating sibling threads After updating microcode on one of the threads of a core, the other thread sibling automatically gets the update since the microcode resources on a hyperthreaded core are shared between the two threads. Check the microcode revision on the CPU before performing a microcode update and thus save us the WRMSR 0x79 because it is a particularly expensive operation. [ Borislav: Massage changelog and coding style. ] Signed-off-by: Ashok Raj Signed-off-by: Borislav Petkov Signed-off-by: Thomas Gleixner Tested-by: Tom Lendacky Tested-by: Ashok Raj Cc: Arjan Van De Ven Link: http://lkml.kernel.org/r/1519352533-15992-2-git-send-email-ashok.raj@intel.com Link: https://lkml.kernel.org/r/20180228102846.13447-3-bp@alien8.de --- arch/x86/kernel/cpu/microcode/intel.c | 27 ++++++++++++++++++++++++--- 1 file changed, 24 insertions(+), 3 deletions(-) diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c index 923054a6b760..87bd6dc94081 100644 --- a/arch/x86/kernel/cpu/microcode/intel.c +++ b/arch/x86/kernel/cpu/microcode/intel.c @@ -589,6 +589,17 @@ static int apply_microcode_early(struct ucode_cpu_info *uci, bool early) if (!mc) return 0; + /* + * Save us the MSR write below - which is a particular expensive + * operation - when the other hyperthread has updated the microcode + * already. + */ + rev = intel_get_microcode_revision(); + if (rev >= mc->hdr.rev) { + uci->cpu_sig.rev = rev; + return UCODE_OK; + } + /* write microcode via MSR 0x79 */ native_wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits); @@ -776,7 +787,7 @@ static enum ucode_state apply_microcode_intel(int cpu) { struct microcode_intel *mc; struct ucode_cpu_info *uci; - struct cpuinfo_x86 *c; + struct cpuinfo_x86 *c = &cpu_data(cpu); static int prev_rev; u32 rev; @@ -793,6 +804,18 @@ static enum ucode_state apply_microcode_intel(int cpu) return UCODE_NFOUND; } + /* + * Save us the MSR write below - which is a particular expensive + * operation - when the other hyperthread has updated the microcode + * already. + */ + rev = intel_get_microcode_revision(); + if (rev >= mc->hdr.rev) { + uci->cpu_sig.rev = rev; + c->microcode = rev; + return UCODE_OK; + } + /* write microcode via MSR 0x79 */ wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits); @@ -813,8 +836,6 @@ static enum ucode_state apply_microcode_intel(int cpu) prev_rev = rev; } - c = &cpu_data(cpu); - uci->cpu_sig.rev = rev; c->microcode = rev;