From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753390AbbDBShd (ORCPT ); Thu, 2 Apr 2015 14:37:33 -0400 Received: from terminus.zytor.com ([198.137.202.10]:36853 "EHLO terminus.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753361AbbDBSh3 (ORCPT ); Thu, 2 Apr 2015 14:37:29 -0400 Date: Thu, 2 Apr 2015 11:36:56 -0700 From: tip-bot for Andi Kleen Message-ID: Cc: tglx@linutronix.de, ak@linux.intel.com, hpa@zytor.com, peterz@infradead.org, linux-kernel@vger.kernel.org, mingo@kernel.org Reply-To: peterz@infradead.org, mingo@kernel.org, linux-kernel@vger.kernel.org, ak@linux.intel.com, tglx@linutronix.de, hpa@zytor.com In-Reply-To: <1425925222-32361-1-git-send-email-andi@firstfloor.org> References: <1425925222-32361-1-git-send-email-andi@firstfloor.org> To: linux-tip-commits@vger.kernel.org Subject: [tip:perf/core] perf/x86/intel: Fix Haswell CYCLE_ACTIVITY.* counter constraints Git-Commit-ID: c420f19b9cdc59662dbb56677417487efc1729ec X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Commit-ID: c420f19b9cdc59662dbb56677417487efc1729ec Gitweb: http://git.kernel.org/tip/c420f19b9cdc59662dbb56677417487efc1729ec Author: Andi Kleen AuthorDate: Mon, 9 Mar 2015 11:20:22 -0700 Committer: Ingo Molnar CommitDate: Thu, 2 Apr 2015 17:07:43 +0200 perf/x86/intel: Fix Haswell CYCLE_ACTIVITY.* counter constraints Some of the CYCLE_ACTIVITY.* events can only be scheduled on counter 2. Due to a typo Haswell matched those with INTEL_EVENT_CONSTRAINT, which lead to the events never matching as the comparison does not expect anything in the umask too. Fix the typo. Signed-off-by: Andi Kleen Signed-off-by: Peter Zijlstra (Intel) Link: http://lkml.kernel.org/r/1425925222-32361-1-git-send-email-andi@firstfloor.org Signed-off-by: Ingo Molnar --- arch/x86/kernel/cpu/perf_event_intel.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c index 40898ab..2589906 100644 --- a/arch/x86/kernel/cpu/perf_event_intel.c +++ b/arch/x86/kernel/cpu/perf_event_intel.c @@ -212,11 +212,11 @@ static struct event_constraint intel_hsw_event_constraints[] = { INTEL_UEVENT_CONSTRAINT(0x01c0, 0x2), /* INST_RETIRED.PREC_DIST */ INTEL_EVENT_CONSTRAINT(0xcd, 0x8), /* MEM_TRANS_RETIRED.LOAD_LATENCY */ /* CYCLE_ACTIVITY.CYCLES_L1D_PENDING */ - INTEL_EVENT_CONSTRAINT(0x08a3, 0x4), + INTEL_UEVENT_CONSTRAINT(0x08a3, 0x4), /* CYCLE_ACTIVITY.STALLS_L1D_PENDING */ - INTEL_EVENT_CONSTRAINT(0x0ca3, 0x4), + INTEL_UEVENT_CONSTRAINT(0x0ca3, 0x4), /* CYCLE_ACTIVITY.CYCLES_NO_EXECUTE */ - INTEL_EVENT_CONSTRAINT(0x04a3, 0xf), + INTEL_UEVENT_CONSTRAINT(0x04a3, 0xf), EVENT_CONSTRAINT_END };