From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752668AbbIRIr1 (ORCPT ); Fri, 18 Sep 2015 04:47:27 -0400 Received: from terminus.zytor.com ([198.137.202.10]:44669 "EHLO terminus.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752132AbbIRIrY (ORCPT ); Fri, 18 Sep 2015 04:47:24 -0400 Date: Fri, 18 Sep 2015 01:46:50 -0700 From: tip-bot for Andi Kleen Message-ID: Cc: peterz@infradead.org, linux-kernel@vger.kernel.org, hpa@zytor.com, mingo@kernel.org, eranian@google.com, torvalds@linux-foundation.org, ak@linux.intel.com, tglx@linutronix.de Reply-To: peterz@infradead.org, linux-kernel@vger.kernel.org, eranian@google.com, torvalds@linux-foundation.org, ak@linux.intel.com, tglx@linutronix.de, hpa@zytor.com, mingo@kernel.org In-Reply-To: <1441835640-21347-3-git-send-email-andi@firstfloor.org> References: <1441835640-21347-3-git-send-email-andi@firstfloor.org> To: linux-tip-commits@vger.kernel.org Subject: [tip:perf/core] perf/x86/intel: Fix Skylake FRONTEND MSR extrareg mask Git-Commit-ID: dfe1f3cb312624928052413928d88b0ee3492216 X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Commit-ID: dfe1f3cb312624928052413928d88b0ee3492216 Gitweb: http://git.kernel.org/tip/dfe1f3cb312624928052413928d88b0ee3492216 Author: Andi Kleen AuthorDate: Wed, 9 Sep 2015 14:54:00 -0700 Committer: Ingo Molnar CommitDate: Fri, 18 Sep 2015 09:20:23 +0200 perf/x86/intel: Fix Skylake FRONTEND MSR extrareg mask Stephane pointed out that the extrareg mask was one bit too short. The bubble width field was truncated by one bit. Fix that here. Also add some extra comments on the reserved bits inside the event select code. Reported-by: Stephane Eranian Signed-off-by: Andi Kleen Signed-off-by: Peter Zijlstra (Intel) Acked-by: Thomas Gleixner Cc: Linus Torvalds Cc: Peter Zijlstra Link: http://lkml.kernel.org/r/1441835640-21347-3-git-send-email-andi@firstfloor.org Signed-off-by: Ingo Molnar --- arch/x86/kernel/cpu/perf_event_intel.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c index ef74c9d..f63360b 100644 --- a/arch/x86/kernel/cpu/perf_event_intel.c +++ b/arch/x86/kernel/cpu/perf_event_intel.c @@ -205,7 +205,11 @@ static struct extra_reg intel_skl_extra_regs[] __read_mostly = { INTEL_UEVENT_EXTRA_REG(0x01b7, MSR_OFFCORE_RSP_0, 0x3fffff8fffull, RSP_0), INTEL_UEVENT_EXTRA_REG(0x01bb, MSR_OFFCORE_RSP_1, 0x3fffff8fffull, RSP_1), INTEL_UEVENT_PEBS_LDLAT_EXTRA_REG(0x01cd), - INTEL_UEVENT_EXTRA_REG(0x01c6, MSR_PEBS_FRONTEND, 0x3fff17, FE), + /* + * Note the low 8 bits eventsel code is not a continuous field, containing + * some #GPing bits. These are masked out. + */ + INTEL_UEVENT_EXTRA_REG(0x01c6, MSR_PEBS_FRONTEND, 0x7fff17, FE), EVENT_EXTRA_END };