From: tip-bot for Markos Chandras <tipbot@zytor.com>
To: linux-tip-commits@vger.kernel.org
Cc: qais.yousef@imgtec.com, hpa@zytor.com,
linux-kernel@vger.kernel.org, tglx@linutronix.de,
jason@lakedaemon.net, abrestic@chromium.org,
markos.chandras@imgtec.com, mingo@kernel.org
Subject: [tip:irq/core] irqchip: mips-gic: Add new functions to start/ stop the GIC counter
Date: Sat, 11 Apr 2015 02:34:04 -0700 [thread overview]
Message-ID: <tip-fa6ed4cb6fd44ef4c6fad4d9572119d22381f32c@git.kernel.org> (raw)
Commit-ID: fa6ed4cb6fd44ef4c6fad4d9572119d22381f32c
Gitweb: http://git.kernel.org/tip/fa6ed4cb6fd44ef4c6fad4d9572119d22381f32c
Author: Markos Chandras <markos.chandras@imgtec.com>
AuthorDate: Mon, 23 Mar 2015 12:32:01 +0000
Committer: Jason Cooper <jason@lakedaemon.net>
CommitDate: Sun, 29 Mar 2015 20:08:23 +0000
irqchip: mips-gic: Add new functions to start/stop the GIC counter
We add new functions to start and stop the GIC counter since there are no
guarantees the counter will be running after a CPU reset. The GIC counter
is stopped by setting the 29th bit on the GIC Config register and it is
started by clearing that bit.
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: Qais Yousef <qais.yousef@imgtec.com>
Cc: <linux-kernel@vger.kernel.org>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Link: https://lkml.kernel.org/r/1427113923-9840-2-git-send-email-markos.chandras@imgtec.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
---
drivers/irqchip/irq-mips-gic.c | 21 +++++++++++++++++++++
include/linux/irqchip/mips-gic.h | 2 ++
2 files changed, 23 insertions(+)
diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c
index 9acdc08..f2d269b 100644
--- a/drivers/irqchip/irq-mips-gic.c
+++ b/drivers/irqchip/irq-mips-gic.c
@@ -166,6 +166,27 @@ cycle_t gic_read_compare(void)
return (((cycle_t) hi) << 32) + lo;
}
+
+void gic_start_count(void)
+{
+ u32 gicconfig;
+
+ /* Start the counter */
+ gicconfig = gic_read(GIC_REG(SHARED, GIC_SH_CONFIG));
+ gicconfig &= ~(1 << GIC_SH_CONFIG_COUNTSTOP_SHF);
+ gic_write(GIC_REG(SHARED, GIC_SH_CONFIG), gicconfig);
+}
+
+void gic_stop_count(void)
+{
+ u32 gicconfig;
+
+ /* Stop the counter */
+ gicconfig = gic_read(GIC_REG(SHARED, GIC_SH_CONFIG));
+ gicconfig |= 1 << GIC_SH_CONFIG_COUNTSTOP_SHF;
+ gic_write(GIC_REG(SHARED, GIC_SH_CONFIG), gicconfig);
+}
+
#endif
static bool gic_local_irq_is_routable(int intr)
diff --git a/include/linux/irqchip/mips-gic.h b/include/linux/irqchip/mips-gic.h
index e6a6aac..3ea2e47 100644
--- a/include/linux/irqchip/mips-gic.h
+++ b/include/linux/irqchip/mips-gic.h
@@ -240,6 +240,8 @@ extern unsigned int gic_get_count_width(void);
extern cycle_t gic_read_compare(void);
extern void gic_write_compare(cycle_t cnt);
extern void gic_write_cpu_compare(cycle_t cnt, int cpu);
+extern void gic_start_count(void);
+extern void gic_stop_count(void);
extern void gic_send_ipi(unsigned int intr);
extern unsigned int plat_ipi_call_int_xlate(unsigned int);
extern unsigned int plat_ipi_resched_int_xlate(unsigned int);
reply other threads:[~2015-04-11 9:34 UTC|newest]
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