From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754585AbbJSRsy (ORCPT ); Mon, 19 Oct 2015 13:48:54 -0400 Received: from terminus.zytor.com ([198.137.202.10]:38064 "EHLO terminus.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752087AbbJSRsw (ORCPT ); Mon, 19 Oct 2015 13:48:52 -0400 Date: Mon, 19 Oct 2015 10:48:12 -0700 From: tip-bot for Len Brown Message-ID: Cc: linux-kernel@vger.kernel.org, shrybman@teksavvy.com, peterz@infradead.org, mingo@kernel.org, len.brown@intel.com, hpa@zytor.com, torvalds@linux-foundation.org, dparsons@brightdsl.net, tglx@linutronix.de Reply-To: hpa@zytor.com, len.brown@intel.com, dparsons@brightdsl.net, tglx@linutronix.de, torvalds@linux-foundation.org, shrybman@teksavvy.com, linux-kernel@vger.kernel.org, peterz@infradead.org, mingo@kernel.org In-Reply-To: <6dd554ee8945984d85aafb2ad35793174d068af0.1444968087.git.len.brown@intel.com> References: <6dd554ee8945984d85aafb2ad35793174d068af0.1444968087.git.len.brown@intel.com> To: linux-tip-commits@vger.kernel.org Subject: [tip:x86/urgent] x86/smpboot: Fix CPU #1 boot timeout Git-Commit-ID: fcafddec4e78a7776db4b6685db6b2902d4300fc X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Commit-ID: fcafddec4e78a7776db4b6685db6b2902d4300fc Gitweb: http://git.kernel.org/tip/fcafddec4e78a7776db4b6685db6b2902d4300fc Author: Len Brown AuthorDate: Fri, 16 Oct 2015 00:14:29 -0400 Committer: Ingo Molnar CommitDate: Mon, 19 Oct 2015 09:14:41 +0200 x86/smpboot: Fix CPU #1 boot timeout The following commit: a9bcaa02a5104ac ("x86/smpboot: Remove SIPI delays from cpu_up()") Caused some Intel Core2 processors to time-out when bringing up CPU #1, resulting in the missing of that CPU after bootup. That patch reduced the SIPI delays from udelay() 300, 200 to udelay() 0, 0 on modern processors. Several Intel(R) Core(TM)2 systems failed to bring up CPU #1 10/10 times after that change. Increasing either of the SIPI delays to udelay(1) results in success. So here we increase both to udelay(10). While this may be 20x slower than the absolute minimum, it is still 20x to 30x faster than the original code. Tested-by: Donald Parsons Tested-by: Shane Signed-off-by: Len Brown Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Thomas Gleixner Cc: dparsons@brightdsl.net Cc: shrybman@teksavvy.com Link: http://lkml.kernel.org/r/6dd554ee8945984d85aafb2ad35793174d068af0.1444968087.git.len.brown@intel.com Signed-off-by: Ingo Molnar --- arch/x86/kernel/smpboot.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c index 32267cc..892ee2e5 100644 --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c @@ -660,7 +660,9 @@ wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip) /* * Give the other CPU some time to accept the IPI. */ - if (init_udelay) + if (init_udelay == 0) + udelay(10); + else udelay(300); pr_debug("Startup point 1\n"); @@ -671,7 +673,9 @@ wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip) /* * Give the other CPU some time to accept the IPI. */ - if (init_udelay) + if (init_udelay == 0) + udelay(10); + else udelay(200); if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */