From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Google-Smtp-Source: AH8x226vrMgCk7T2Pu2Ayn3aNjN5SzQ4OB4nxtmTMiLL/odcUfarpDXR3cy53WgyRANsDm18qka+ ARC-Seal: i=1; a=rsa-sha256; t=1516979027; cv=none; d=google.com; s=arc-20160816; b=FnHX1TtFwy71tfoj3F1nvz4e9VZM+crp03S4R4qUjzXPrDUPKTJl25YU8NVUaQhJhf slWr+UYXFgDlSUlbTpJdgImYkmf+nxvCLJjSeXEOnTpF6zvs9xol6FLriuQPFi2OBnrj pkXlUHCfb3/dIrA+856kx/JmR1qRM+1jUvuIO+URlf48+Wl4QW1mnugLlk3csI2AMzHV 3sYzD5V7XQToU9LehhwuhSyO9KdCyrs0jeCMAmM9XebvXY74RhHjBVUU0nMIYvkPn0DB aW4fYJGn9/f+5ZE0y1AybMKtk1n6DrYSrAi6o/XoVbjyKPqDkWmsjoYI9wdM03kj0hJL tcMw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=precedence:content-disposition:content-transfer-encoding :mime-version:robot-unsubscribe:robot-id:git-commit-id:subject:to :references:in-reply-to:reply-to:cc:message-id:from:sender:date :arc-authentication-results; bh=SJ6HKD2fGpLJfwrwt/43PYlJtcQJ9d++TneXBU/haIU=; b=L9EJ833Zu63IZpfx7uJjqveq6pKiwyCbJbQ9DdlxWdpt5vkQiM+jhZVN/GEEPFJ488 L2e9q/8KfuCl5iIEnI+maA2IPZygPiJaaILjjawRlAcw0bLoJE+bqXLstwY0tJ9V7uUO na7NKfiXlOdY9CyFhZXR5wRTBh07PEMopcfc0B5JXL+hP4xEutL3C+DGpn9xxXtGAUue 1XRfu1XsXp8s8w7uVEEfzoGsrrfuGId/3kokhODJV6wC8mK1vZw1PYaNuz0EoLRA99yy iLiDT1GEq1erjz2vf9CarlxPGOwESs5PuEiNt0UqDYMs8OASLJsax/V4o0ase1AoPI9D 31nA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of tipbot@zytor.com designates 65.50.211.136 as permitted sender) smtp.mailfrom=tipbot@zytor.com Authentication-Results: mx.google.com; spf=pass (google.com: domain of tipbot@zytor.com designates 65.50.211.136 as permitted sender) smtp.mailfrom=tipbot@zytor.com Date: Fri, 26 Jan 2018 07:01:24 -0800 Sender: tip tree robot From: tip-bot for David Woodhouse Message-ID: Cc: gregkh@linuxfoundation.org, dave.hansen@intel.com, tglx@linutronix.de, bp@suse.de, linux-kernel@vger.kernel.org, mingo@kernel.org, hpa@zytor.com, dwmw@amazon.co.uk Reply-To: dwmw@amazon.co.uk, hpa@zytor.com, linux-kernel@vger.kernel.org, mingo@kernel.org, dave.hansen@intel.com, bp@suse.de, tglx@linutronix.de, gregkh@linuxfoundation.org In-Reply-To: <1516896855-7642-6-git-send-email-dwmw@amazon.co.uk> References: <1516896855-7642-6-git-send-email-dwmw@amazon.co.uk> To: linux-tip-commits@vger.kernel.org Subject: [tip:x86/pti] x86/pti: Do not enable PTI on CPUs which are not vulnerable to Meltdown Git-Commit-ID: fec9434a12f38d3aeafeb75711b71d8a1fdef621 X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: =?utf-8?q?1590667801136491380?= X-GMAIL-MSGID: =?utf-8?q?1590667801136491380?= X-Mailing-List: linux-kernel@vger.kernel.org List-ID: Commit-ID: fec9434a12f38d3aeafeb75711b71d8a1fdef621 Gitweb: https://git.kernel.org/tip/fec9434a12f38d3aeafeb75711b71d8a1fdef621 Author: David Woodhouse AuthorDate: Thu, 25 Jan 2018 16:14:13 +0000 Committer: Thomas Gleixner CommitDate: Fri, 26 Jan 2018 15:53:18 +0100 x86/pti: Do not enable PTI on CPUs which are not vulnerable to Meltdown Also, for CPUs which don't speculate at all, don't report that they're vulnerable to the Spectre variants either. Leave the cpu_no_meltdown[] match table with just X86_VENDOR_AMD in it for now, even though that could be done with a simple comparison, on the assumption that we'll have more to add. Based on suggestions from Dave Hansen and Alan Cox. Signed-off-by: David Woodhouse Signed-off-by: Thomas Gleixner Reviewed-by: Greg Kroah-Hartman Reviewed-by: Borislav Petkov Acked-by: Dave Hansen Cc: gnomes@lxorguk.ukuu.org.uk Cc: ak@linux.intel.com Cc: ashok.raj@intel.com Cc: karahmed@amazon.de Cc: arjan@linux.intel.com Cc: torvalds@linux-foundation.org Cc: peterz@infradead.org Cc: bp@alien8.de Cc: pbonzini@redhat.com Cc: tim.c.chen@linux.intel.com Cc: gregkh@linux-foundation.org Link: https://lkml.kernel.org/r/1516896855-7642-6-git-send-email-dwmw@amazon.co.uk --- arch/x86/kernel/cpu/common.c | 48 +++++++++++++++++++++++++++++++++++++++----- 1 file changed, 43 insertions(+), 5 deletions(-) diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index e5d66e9..970ee06 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -47,6 +47,8 @@ #include #include #include +#include +#include #ifdef CONFIG_X86_LOCAL_APIC #include @@ -853,6 +855,41 @@ static void identify_cpu_without_cpuid(struct cpuinfo_x86 *c) #endif } +static const __initdata struct x86_cpu_id cpu_no_speculation[] = { + { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_CEDARVIEW, X86_FEATURE_ANY }, + { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_CLOVERVIEW, X86_FEATURE_ANY }, + { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_LINCROFT, X86_FEATURE_ANY }, + { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_PENWELL, X86_FEATURE_ANY }, + { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_PINEVIEW, X86_FEATURE_ANY }, + { X86_VENDOR_CENTAUR, 5 }, + { X86_VENDOR_INTEL, 5 }, + { X86_VENDOR_NSC, 5 }, + { X86_VENDOR_ANY, 4 }, + {} +}; + +static const __initdata struct x86_cpu_id cpu_no_meltdown[] = { + { X86_VENDOR_AMD }, + {} +}; + +static bool __init cpu_vulnerable_to_meltdown(struct cpuinfo_x86 *c) +{ + u64 ia32_cap = 0; + + if (x86_match_cpu(cpu_no_meltdown)) + return false; + + if (cpu_has(c, X86_FEATURE_ARCH_CAPABILITIES)) + rdmsrl(MSR_IA32_ARCH_CAPABILITIES, ia32_cap); + + /* Rogue Data Cache Load? No! */ + if (ia32_cap & ARCH_CAP_RDCL_NO) + return false; + + return true; +} + /* * Do minimum CPU detection early. * Fields really needed: vendor, cpuid_level, family, model, mask, @@ -900,11 +937,12 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c) setup_force_cpu_cap(X86_FEATURE_ALWAYS); - if (c->x86_vendor != X86_VENDOR_AMD) - setup_force_cpu_bug(X86_BUG_CPU_MELTDOWN); - - setup_force_cpu_bug(X86_BUG_SPECTRE_V1); - setup_force_cpu_bug(X86_BUG_SPECTRE_V2); + if (!x86_match_cpu(cpu_no_speculation)) { + if (cpu_vulnerable_to_meltdown(c)) + setup_force_cpu_bug(X86_BUG_CPU_MELTDOWN); + setup_force_cpu_bug(X86_BUG_SPECTRE_V1); + setup_force_cpu_bug(X86_BUG_SPECTRE_V2); + } fpu__init_system(c);