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[2001:14ba:a073:af00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-39b4ad357aesm31978761fa.10.2026.07.08.04.35.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Jul 2026 04:35:22 -0700 (PDT) Date: Wed, 8 Jul 2026 14:35:20 +0300 From: Dmitry Baryshkov To: Vladimir Zapolskiy Cc: "Gjorgji Rosikopulos (Consultant)" , Atanas Filipov , linux-media@vger.kernel.org, bryan.odonoghue@linaro.org, loic.poulain@oss.qualcomm.com, mchehab@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, andersson@kernel.org, konradybcio@kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v4 5/5] media: qcom: jpeg: Add Qualcomm JPEG V4L2 encoder Message-ID: References: <20260706071113.383215-1-atanas.filipov@oss.qualcomm.com> <20260706071113.383215-6-atanas.filipov@oss.qualcomm.com> <51a0abf2-2a72-4551-894b-2c2de91ba0c2@linaro.org> <74a5b549-987c-4dac-a1a0-ff81150cd6ab@oss.qualcomm.com> <56f1fd7e-42bc-4034-81dc-302cb7c22951@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: X-Proofpoint-GUID: uLHFrBpXU7u5j9XDZNyTE0MMrjHlVvkk X-Proofpoint-Spam-Info: AW1haW4tMjYwNzA4MDExMSBTYWx0ZWRfX1FErDyv3cO8t hzqTSgcWEkh6yldhI6OKQYnFv6MDC8qm79ngF10VQNqRYBObieP4j+8Gs/BP7oTA/8JNDHt11ET RYi494tGaDmkffui5q1BToXfpFSA00M= X-Authority-Analysis: v=2.4 cv=CNoamxrD c=1 sm=1 tr=0 ts=6a4e35fc cx=c_pps a=P2rfLEam3zuxRRdjJWA2cw==:117 a=xqWC_Br6kY4A:10 a=8nJEP1OIZ-IA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=-aB-LbtdYsWEe7JLRJkA:9 a=3ZKOabzyN94A:10 a=wPNLvfGTeEIA:10 a=ODZdjJIeia2B_SHc_B0f:22 X-Proofpoint-ORIG-GUID: uLHFrBpXU7u5j9XDZNyTE0MMrjHlVvkk X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzA4MDExMSBTYWx0ZWRfXxKuyG6HyetEe Z1mNBy5E0/VsVtSnzaMyGVNI0tSTfFa2ZHgXj9La76FbFxpWYdNNjx/B/M0eMQFx+M9TAL1wSdd /DesdPJfznS/VH6s22PuGYI63/3Ky714BxRxveLFT0OZhTAzhhYPOZvnpWajpGzmk/9fIYr+Os4 ZtFlc/11sJicfjuZ8o9V1ebcfw90iVU8g5qNSbiVoMKm2yoy+17a4H7ikU5gg8MXitmcaRjSXcc uCO7NJ/wIQvPEO4gTW51vP+nXdqPFXFUVBSca8eGwNZEBHQmV90NBuaSoMWfOTRkMnFyGb/Ziv2 KkgRrD0brOYjS4CNdc91AoCB4L6gd0Ua9Z2YL2XZS519AdPJR0Wvag6VvZTFSMJ6QE04ScmChkj 90j0rQfF3+TAuLZ8buV2GBPMJ0ZCAyTjQEIqJMD/JMvpMyc8YYxZxyrM4f5S+AMNnwKRsJcnm0d 3rVgg+8UJCSPacKAANg== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-08_01,2026-07-08_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 malwarescore=0 adultscore=0 phishscore=0 impostorscore=0 priorityscore=1501 lowpriorityscore=0 bulkscore=0 spamscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607080111 On Wed, Jul 08, 2026 at 01:28:46PM +0300, Vladimir Zapolskiy wrote: > Hi Gjorgji. > > On 7/8/26 12:32, Gjorgji Rosikopulos (Consultant) wrote: > > Hi Vlad, > > > > On 7/8/2026 11:47 AM, Vladimir Zapolskiy wrote: > > > Hi Gjorgji. > > > > > > On 7/7/26 16:24, Gjorgji Rosikopulos (Consultant) wrote: > > > > Hi Vlad, > > > > > > > > On 7/6/2026 10:46 AM, Vladimir Zapolskiy wrote: > > > > > > > > > > > > > > > > +            interconnects = <&gem_noc MASTER_AMPSS_M0 > > > > > > QCOM_ICC_TAG_ACTIVE_ONLY > > > > > > +                             &config_noc SLAVE_CAMERA_CFG > > > > > > QCOM_ICC_TAG_ACTIVE_ONLY>, > > > > > > +                            <&mmss_noc MASTER_CAMNOC_HF > > > > > > QCOM_ICC_TAG_ALWAYS > > > > > > +                             &mc_virt SLAVE_EBI_CH0 > > > > > > QCOM_ICC_TAG_ALWAYS>, > > > > > > +                            <&mmss_noc MASTER_CAMNOC_SF > > > > > > QCOM_ICC_TAG_ALWAYS > > > > > > +                             &mc_virt SLAVE_EBI_CH0 > > > > > > QCOM_ICC_TAG_ALWAYS>; > > > > > > +            interconnect-names = "cpu-cfg", > > > > > > +                                 "hf-mnoc", > > > > > > +                                 "sf-mnoc"; > > > > > > > > > > This is the topic, which may raise a disagreement, but I'll repeat my > > > > > position about the need to remove all "CAMSS bus" specific resources from > > > > > the device node, they are found and should be allocated on parent's side. > > > > > > > > The interconnect has functionality to handle bw requests from different > > > > clients. > > > > > > > > Yes the best will be to have camss interconnect, so jpeg and other hw's > > > > to vote > > > > > > > > on that (actually it is possible in icc framework) but what is the > > > > benefit of moving > > > > > > > > those to camss? Is it not better to create camss icc. I understand > > > > you want them to be on parent side. But how to vote on bw? Most of the > > > > time it > > > > > > Let's concentrate on hardware bindings description, no APIs, votes etc. > > > at this point of discussion. > > I agree but there should be an API for icc voting which Jpeg need to use, > > currently it is fixed to some values, but voting need to become dynamic > > at some point of time, because it depends on runtime parameters, resolution > > format etc.> > > Sure, but I believe it's quite clear that any software implementation > should be discussed only when the hardware description is fixed. > > > > There is SM8250 CAMSS device, which serves as a hierarchical parent (or > > > could be considered as a "bus" device) to this new JPEG encoder device > > > and probably to a number of future IPs under CAMSS. All CAMSS sub-devices > > > get hardware descriptions as children device tree nodes of CAMSS parent > > > device tree node naturally. > > I agree the device tree is best to represent real hw topology. > > > Well, it's not just the best, it's the only possible way. > > > > Copying of the same identical information about clocks, interconnects > > > and power domains from the hierarchical parent device to children devices > > > is not needed, and practically it only lowers signal-to-noise ratio. > > Here also i tend to agree.> > > > Since information about the actual defect in hardware description is > > > reported, the problem can and should be avoided, the handling of a better > > > hardware description and dealing with any kind of complexity will be done > > > in the CAMSS and/or CAMSS children drivers. > > > > > > If you need to get a bit more formal point of view on the matter, I'd > > > prefer to see descriptions of hardware properties organised in a tree > > > topology rather than in the originally proposed star topology. By doing > > > it the system complexity is reduced from N to 1. > > > > Maybe I'm missing the whole picture of your proposal, but I want to add my > > point of view on this matter. > > > > The JPEG encoder HW block has no dependency on the other processing HW > > blocks in the camera subsystem > > > > It shares resources like camnoc, clocks, GDSC, etc., > > but does not share anything with the other HW processing blocks. For me, > > the JPEG driver should not have SW architectural dependencies on CAMSS. > > To move forward there should be a clear answer to a simple question, > does Qualcomm JPEG encoder IP belong to CAMSS group of devices or not? > > If no, then JPEG encoder device tree node shall be located outside of > CAMSS device tree node, all resources needed for JPEG encoder device > operation get their descrition in this stand-alone device tree node. > > If yes, then JPEG encoder device tree node is a child of CAMSS "bus" > device tree node, and only resources specific to JPEG encoder device > are described in its device tree node, because other resources are > already described in the parent device tree node. 2c from my side (for both sides of the discussion). Please keep it separate, if the block simply uses the resource which is also used by the parent (e.g. there are no special requirements on the AHB or sleep clocks) or if the device needs to actuall cast a vote on a particular resource (e.g. for this to function at this performance level, the MMCX needs to be at the turbo level OR for this to function at this performance level it will use 123 MHz of the AXI clock). In the latter case the resources must be described as a part of the device. -- With best wishes Dmitry