From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752409AbcAEVu7 (ORCPT ); Tue, 5 Jan 2016 16:50:59 -0500 Received: from unicorn.mansr.com ([81.2.72.234]:37046 "EHLO unicorn.mansr.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751826AbcAEVu5 convert rfc822-to-8bit (ORCPT ); Tue, 5 Jan 2016 16:50:57 -0500 From: =?iso-8859-1?Q?M=E5ns_Rullg=E5rd?= To: Cyrille Pitchen Cc: Nicolas Ferre , Mark Browk , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala Subject: Re: [PATCH v3 1/3] spi: atmel: add support for the internal chip-select of the spi controller References: Date: Tue, 05 Jan 2016 21:50:54 +0000 In-Reply-To: (Cyrille Pitchen's message of "Tue, 9 Jun 2015 13:53:52 +0200") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.5 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Cyrille Pitchen writes: > This patch relies on the CSAAT (Chip Select Active After Transfer) feature > introduced by the version 2 of the spi controller. This new mode allows to > use properly the internal chip-select output pin of the spi controller > instead of using external gpios. Consequently, the "cs-gpios" device-tree > property becomes optional. > > When the new CSAAT bit is set into the Chip Select Register, the internal > chip-select output pin remains asserted till both the following conditions > become true: > - the LASTXFER bit is set into the Control Register (or the Transmit Data > Register) > - the Transmit Data Register and its shift register are empty. > > WARNING: if the LASTXFER bit is set into the Control Register then new > data are written into the Transmit Data Register fast enough to keep its > shifter not empty, the chip-select output pin remains asserted. Only when > the shifter becomes empty, the chip-select output pin is unasserted. > > When the CSAAT bit is clear in the Chip Select Register, the LASTXFER bit > is ignored in both the Control Register and the Transmit Data Register. > The internal chip-select output pin remains active as long as the Transmit > Data Register or its shift register are not empty. > > Signed-off-by: Cyrille Pitchen > --- > drivers/spi/spi-atmel.c | 37 ++++++++++++++++++++++++++++--------- > 1 file changed, 28 insertions(+), 9 deletions(-) [...] > @@ -1338,6 +1350,13 @@ static int atmel_spi_probe(struct platform_device *pdev) > > atmel_get_caps(as); > > + as->use_cs_gpios = true; > + if (atmel_spi_is_v2(as) && > + !of_get_property(pdev->dev.of_node, "cs-gpios", NULL)) { > + as->use_cs_gpios = false; > + master->num_chipselect = 4; > + } This part breaks the AVR32 boards and probably anything else that doesn't use devicetree but does use GPIOs for chip select. -- Måns Rullgård