From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752901AbbJBOhZ (ORCPT ); Fri, 2 Oct 2015 10:37:25 -0400 Received: from unicorn.mansr.com ([81.2.72.234]:37226 "EHLO unicorn.mansr.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752451AbbJBOhT convert rfc822-to-8bit (ORCPT ); Fri, 2 Oct 2015 10:37:19 -0400 From: =?iso-8859-1?Q?M=E5ns_Rullg=E5rd?= To: Sergei Shtylyov Cc: Russell King , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] ARM: debug: add support for alternate 8250 register layout References: <1443787929-19173-1-git-send-email-mans@mansr.com> <560E9268.60900@cogentembedded.com> <560E956A.6070700@cogentembedded.com> Date: Fri, 02 Oct 2015 15:37:17 +0100 In-Reply-To: <560E956A.6070700@cogentembedded.com> (Sergei Shtylyov's message of "Fri, 2 Oct 2015 17:32:10 +0300") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.5 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Sergei Shtylyov writes: > On 10/2/2015 5:26 PM, Måns Rullgård wrote: > >>>> Some SoCs have a UART with a non-standard register layout. This >>>> allows the debug console to work with these. >>> >>>> Signed-off-by: Mans Rullgard >>>> --- >>>> I would have preferred a more accurate description of the UART, but I've >>>> not managed to figure out who the vendor is. >>> >>> You haven't seem the Alchemy datasheets? I can send you some if so. >> >> I have. They don't say where Alchemy bought the UART block. > > In fact, seeing at least Au1550 databook googling for "alchemy databook". > The UART registers are described there. Perhaps, it's not accurate > enought for your needs, though... I have all the information I need about how it works. >>>> --- >>>> arch/arm/Kconfig.debug | 4 ++++ >>>> arch/arm/include/debug/8250.S | 12 ++++++++++++ >>>> 2 files changed, 16 insertions(+) >>>> >>>> diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug >>>> index 0cfd7f9..8d5c837 100644 >>>> --- a/arch/arm/Kconfig.debug >>>> +++ b/arch/arm/Kconfig.debug >>>> @@ -1597,6 +1597,10 @@ config DEBUG_UART_8250_WORD >>>> DEBUG_BCM_KONA_UART || DEBUG_RK32_UART2 || \ >>>> DEBUG_BRCMSTB_UART >>>> >>>> +config DEBUG_UART_8250_AU >>>> + bool "8250 UART has Alchemy register layout" >>>> + depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250 >>>> + >>> >>> So Alchemy UART got reused on ARM? >> >> The UART is actually a Palmchip IP core used by several SoC companies. > > Hm, how have you figured out that;s Palmchip if the Alchemy > databooks are silent about that? :-) Someone with access to hardware design files told me. -- Måns Rullgård mans@mansr.com