Re: [PATCH RFC RFT v2 2/3] clk: divider: add CLK_DIVIDER_INVALID_ZERO flag

[Jian Hu <jian.hu@amlogic.com>]

On 10/29/2026 5:47 PM, sashiko-bot@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> - [High] clk: divider: unhandled zero divisor in divider_ro_determine_rate()
> --
>
> commit 5ec3118aee2f03855552c58a4a8533e035b565bc
> Author: Jian Hu <jian.hu@amlogic.com>
>
> clk: divider: add CLK_DIVIDER_INVALID_ZERO flag
>
> This commit introduces the CLK_DIVIDER_INVALID_ZERO flag for dividers where
> a zero divisor value represents an invalid hardware state rather than a
> pass-through. When this flag is set and the divisor evaluates to zero,
> divider_recalc_rate() returns 0 without emitting a warning.
>
>> diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
>> index f68216c65d3df..6c1523d22477c 100644
>> --- a/drivers/clk/clk-divider.c
>> +++ b/drivers/clk/clk-divider.c
>> @@ -143,6 +143,9 @@ unsigned long divider_recalc_rate(struct clk_hw *hw, unsigned long parent_rate,
>>
>>        div = _get_div(table, val, flags, width);
>>        if (!div) {
>> +             if (flags & CLK_DIVIDER_INVALID_ZERO)
>> +                     return 0;
> [Severity: High]
> Should divider_ro_determine_rate() in drivers/clk/clk-divider.c also handle
> a zero divisor when CLK_DIVIDER_INVALID_ZERO or CLK_DIVIDER_ALLOW_ZERO is
> set?
>
> When a read-only divider has a register value val that maps to div == 0 via
> _get_div() (for example, when CLK_DIVIDER_INVALID_ZERO is combined with
> CLK_DIVIDER_ONE_BASED or an unmapped table entry alongside
> CLK_DIVIDER_READ_ONLY), calling clk_round_rate() or clk_set_rate() invokes
> clk_divider_determine_rate()->divider_ro_determine_rate():
>
> drivers/clk/clk-divider.c:divider_ro_determine_rate() {
>          int div;
>
>          div = _get_div(table, val, flags, width);
>
>          /* Even a read-only clock can propagate a rate change */
>          if (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) {
>                  if (!req->best_parent_hw)
>                          return -EINVAL;
>
>                  req->best_parent_rate = clk_hw_round_rate(req->best_parent_hw,
>                                                            req->rate * div);
>          }
>
>          req->rate = DIV_ROUND_UP_ULL((u64)req->best_parent_rate, div);
>
>          return 0;
> }
>
> Unlike divider_recalc_rate(), divider_ro_determine_rate() does not check for
> !div before calling DIV_ROUND_UP_ULL(), which will trigger a division by zero
> in the kernel when div is 0.


In this patch, the dividers which set CLK_DIVIDER_INVALID_ZERO use 
divider_determine_rate(),

not divider_ro_determine_rate().


divider_ro_determine_rate() is used for read-only dividers, which do not 
have CLK_DIVIDER_INVALID_ZERO

set in the current implementation.



Therefore, a zero divisor caused by CLK_DIVIDER_INVALID_ZERO cannot occur in

divider_ro_determine_rate(), and no additional check is needed here.

> --
> Sashiko AI review · https://sashiko.dev/#/patchset/20261029-meson_refactor_n-v2-0-ff4ac74e527b@amlogic.com?part=2

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