* [PATCH v3 0/7] soc: amlogic: clk-measure: Add clk-measure support for C3 and S4
@ 2025-04-15 2:45 Chuan Liu via B4 Relay
2025-04-15 2:45 ` [PATCH v3 1/7] soc: amlogic: clk-measure: Define MSR_CLK's register offset separately Chuan Liu via B4 Relay
` (8 more replies)
0 siblings, 9 replies; 11+ messages in thread
From: Chuan Liu via B4 Relay @ 2025-04-15 2:45 UTC (permalink / raw)
To: Neil Armstrong, Kevin Hilman, Jerome Brunet, Martin Blumenstingl,
Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-kernel, linux-amlogic, linux-kernel, devicetree, Chuan Liu
Add clk-measure support for C3/S4 SoCs.
Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
---
Changes in v3:
- Change struct msr_reg_offset to const.
- Link to v2: https://lore.kernel.org/r/20250414-clk-measure-v2-0-65077690053a@amlogic.com
Changes in v2:
- 1 Rename the clk-measure register.
- 2 Remove unused registers.
- 3 Share reg_offset across multiple chips.
- Link to v1: https://lore.kernel.org/r/20250411-clk-measure-v1-0-cb46a78d019a@amlogic.com
---
Chuan Liu (7):
soc: amlogic: clk-measure: Define MSR_CLK's register offset separately
dt-bindings: soc: amlogic: C3 supports clk-measure
dt-bindings: soc: amlogic: S4 supports clk-measure
soc: amlogic: clk-measure: Add support for C3
soc: amlogic: clk-measure: Add support for S4
arm64: dts: amlogic: C3: Add clk-measure controller node
arm64: dts: amlogic: S4: Add clk-measure controller node
.../soc/amlogic/amlogic,meson-gx-clk-measure.yaml | 2 +
arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi | 5 +
arch/arm64/boot/dts/amlogic/meson-s4.dtsi | 5 +
drivers/soc/amlogic/meson-clk-measure.c | 375 ++++++++++++++++++++-
4 files changed, 372 insertions(+), 15 deletions(-)
---
base-commit: 37021be47d02d2913d6767795a6f4c72b4e63a4f
change-id: 20250411-clk-measure-d33c5ab62669
Best regards,
--
Chuan Liu <chuan.liu@amlogic.com>
_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v3 1/7] soc: amlogic: clk-measure: Define MSR_CLK's register offset separately
2025-04-15 2:45 [PATCH v3 0/7] soc: amlogic: clk-measure: Add clk-measure support for C3 and S4 Chuan Liu via B4 Relay
@ 2025-04-15 2:45 ` Chuan Liu via B4 Relay
2025-04-15 2:45 ` [PATCH v3 2/7] dt-bindings: soc: amlogic: C3 supports clk-measure Chuan Liu via B4 Relay
` (7 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Chuan Liu via B4 Relay @ 2025-04-15 2:45 UTC (permalink / raw)
To: Neil Armstrong, Kevin Hilman, Jerome Brunet, Martin Blumenstingl,
Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-kernel, linux-amlogic, linux-kernel, devicetree, Chuan Liu
From: Chuan Liu <chuan.liu@amlogic.com>
Since the MSR_CLK register offset differs between chip variants, we
replace the macro-based definition with chip-specific assignments.
Change the max_register in regmap_config to be retrieved from DTS.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
---
drivers/soc/amlogic/meson-clk-measure.c | 55 ++++++++++++++++++++++++---------
1 file changed, 40 insertions(+), 15 deletions(-)
diff --git a/drivers/soc/amlogic/meson-clk-measure.c b/drivers/soc/amlogic/meson-clk-measure.c
index 39638d6a593c..3594ef5b7ff0 100644
--- a/drivers/soc/amlogic/meson-clk-measure.c
+++ b/drivers/soc/amlogic/meson-clk-measure.c
@@ -14,11 +14,6 @@
static DEFINE_MUTEX(measure_lock);
-#define MSR_CLK_DUTY 0x0
-#define MSR_CLK_REG0 0x4
-#define MSR_CLK_REG1 0x8
-#define MSR_CLK_REG2 0xc
-
#define MSR_DURATION GENMASK(15, 0)
#define MSR_ENABLE BIT(16)
#define MSR_CONT BIT(17) /* continuous measurement */
@@ -39,9 +34,17 @@ struct meson_msr_id {
const char *name;
};
+struct msr_reg_offset {
+ unsigned int duty_val;
+ unsigned int freq_ctrl;
+ unsigned int duty_ctrl;
+ unsigned int freq_val;
+};
+
struct meson_msr_data {
struct meson_msr_id *msr_table;
unsigned int msr_count;
+ const struct msr_reg_offset *reg;
};
struct meson_msr {
@@ -495,6 +498,7 @@ static int meson_measure_id(struct meson_msr_id *clk_msr_id,
unsigned int duration)
{
struct meson_msr *priv = clk_msr_id->priv;
+ const struct msr_reg_offset *reg = priv->data.reg;
unsigned int val;
int ret;
@@ -502,22 +506,22 @@ static int meson_measure_id(struct meson_msr_id *clk_msr_id,
if (ret)
return ret;
- regmap_write(priv->regmap, MSR_CLK_REG0, 0);
+ regmap_write(priv->regmap, reg->freq_ctrl, 0);
/* Set measurement duration */
- regmap_update_bits(priv->regmap, MSR_CLK_REG0, MSR_DURATION,
+ regmap_update_bits(priv->regmap, reg->freq_ctrl, MSR_DURATION,
FIELD_PREP(MSR_DURATION, duration - 1));
/* Set ID */
- regmap_update_bits(priv->regmap, MSR_CLK_REG0, MSR_CLK_SRC,
+ regmap_update_bits(priv->regmap, reg->freq_ctrl, MSR_CLK_SRC,
FIELD_PREP(MSR_CLK_SRC, clk_msr_id->id));
/* Enable & Start */
- regmap_update_bits(priv->regmap, MSR_CLK_REG0,
+ regmap_update_bits(priv->regmap, reg->freq_ctrl,
MSR_RUN | MSR_ENABLE,
MSR_RUN | MSR_ENABLE);
- ret = regmap_read_poll_timeout(priv->regmap, MSR_CLK_REG0,
+ ret = regmap_read_poll_timeout(priv->regmap, reg->freq_ctrl,
val, !(val & MSR_BUSY), 10, 10000);
if (ret) {
mutex_unlock(&measure_lock);
@@ -525,10 +529,10 @@ static int meson_measure_id(struct meson_msr_id *clk_msr_id,
}
/* Disable */
- regmap_update_bits(priv->regmap, MSR_CLK_REG0, MSR_ENABLE, 0);
+ regmap_update_bits(priv->regmap, reg->freq_ctrl, MSR_ENABLE, 0);
/* Get the value in multiple of gate time counts */
- regmap_read(priv->regmap, MSR_CLK_REG2, &val);
+ regmap_read(priv->regmap, reg->freq_val, &val);
mutex_unlock(&measure_lock);
@@ -599,11 +603,10 @@ static int clk_msr_summary_show(struct seq_file *s, void *data)
}
DEFINE_SHOW_ATTRIBUTE(clk_msr_summary);
-static const struct regmap_config meson_clk_msr_regmap_config = {
+static struct regmap_config meson_clk_msr_regmap_config = {
.reg_bits = 32,
.val_bits = 32,
.reg_stride = 4,
- .max_register = MSR_CLK_REG2,
};
static int meson_msr_probe(struct platform_device *pdev)
@@ -611,6 +614,7 @@ static int meson_msr_probe(struct platform_device *pdev)
const struct meson_msr_data *match_data;
struct meson_msr *priv;
struct dentry *root, *clks;
+ struct resource *res;
void __iomem *base;
int i;
@@ -636,15 +640,24 @@ static int meson_msr_probe(struct platform_device *pdev)
match_data->msr_count * sizeof(struct meson_msr_id));
priv->data.msr_count = match_data->msr_count;
- base = devm_platform_ioremap_resource(pdev, 0);
+ base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
if (IS_ERR(base))
return PTR_ERR(base);
+ meson_clk_msr_regmap_config.max_register = resource_size(res) - 4;
priv->regmap = devm_regmap_init_mmio(&pdev->dev, base,
&meson_clk_msr_regmap_config);
if (IS_ERR(priv->regmap))
return PTR_ERR(priv->regmap);
+ priv->data.reg = devm_kzalloc(&pdev->dev, sizeof(struct msr_reg_offset),
+ GFP_KERNEL);
+ if (!priv->data.reg)
+ return -ENOMEM;
+
+ memcpy((void *)priv->data.reg, match_data->reg,
+ sizeof(struct msr_reg_offset));
+
root = debugfs_create_dir("meson-clk-msr", NULL);
clks = debugfs_create_dir("clks", root);
@@ -664,29 +677,41 @@ static int meson_msr_probe(struct platform_device *pdev)
return 0;
}
+static const struct msr_reg_offset msr_reg_offset = {
+ .duty_val = 0x0,
+ .freq_ctrl = 0x4,
+ .duty_ctrl = 0x8,
+ .freq_val = 0xc,
+};
+
static const struct meson_msr_data clk_msr_gx_data = {
.msr_table = (void *)clk_msr_gx,
.msr_count = ARRAY_SIZE(clk_msr_gx),
+ .reg = &msr_reg_offset,
};
static const struct meson_msr_data clk_msr_m8_data = {
.msr_table = (void *)clk_msr_m8,
.msr_count = ARRAY_SIZE(clk_msr_m8),
+ .reg = &msr_reg_offset,
};
static const struct meson_msr_data clk_msr_axg_data = {
.msr_table = (void *)clk_msr_axg,
.msr_count = ARRAY_SIZE(clk_msr_axg),
+ .reg = &msr_reg_offset,
};
static const struct meson_msr_data clk_msr_g12a_data = {
.msr_table = (void *)clk_msr_g12a,
.msr_count = ARRAY_SIZE(clk_msr_g12a),
+ .reg = &msr_reg_offset,
};
static const struct meson_msr_data clk_msr_sm1_data = {
.msr_table = (void *)clk_msr_sm1,
.msr_count = ARRAY_SIZE(clk_msr_sm1),
+ .reg = &msr_reg_offset,
};
static const struct of_device_id meson_msr_match_table[] = {
--
2.42.0
_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v3 2/7] dt-bindings: soc: amlogic: C3 supports clk-measure
2025-04-15 2:45 [PATCH v3 0/7] soc: amlogic: clk-measure: Add clk-measure support for C3 and S4 Chuan Liu via B4 Relay
2025-04-15 2:45 ` [PATCH v3 1/7] soc: amlogic: clk-measure: Define MSR_CLK's register offset separately Chuan Liu via B4 Relay
@ 2025-04-15 2:45 ` Chuan Liu via B4 Relay
2025-04-15 4:31 ` Rob Herring (Arm)
2025-04-15 2:45 ` [PATCH v3 3/7] dt-bindings: soc: amlogic: S4 " Chuan Liu via B4 Relay
` (6 subsequent siblings)
8 siblings, 1 reply; 11+ messages in thread
From: Chuan Liu via B4 Relay @ 2025-04-15 2:45 UTC (permalink / raw)
To: Neil Armstrong, Kevin Hilman, Jerome Brunet, Martin Blumenstingl,
Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-kernel, linux-amlogic, linux-kernel, devicetree, Chuan Liu
From: Chuan Liu <chuan.liu@amlogic.com>
C3 adds support for clk-measure.
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
---
.../devicetree/bindings/soc/amlogic/amlogic,meson-gx-clk-measure.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-clk-measure.yaml b/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-clk-measure.yaml
index 77c281153010..275afe7fe374 100644
--- a/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-clk-measure.yaml
+++ b/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-clk-measure.yaml
@@ -22,6 +22,7 @@ properties:
- amlogic,meson-axg-clk-measure
- amlogic,meson-g12a-clk-measure
- amlogic,meson-sm1-clk-measure
+ - amlogic,c3-clk-measure
reg:
maxItems: 1
--
2.42.0
_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v3 3/7] dt-bindings: soc: amlogic: S4 supports clk-measure
2025-04-15 2:45 [PATCH v3 0/7] soc: amlogic: clk-measure: Add clk-measure support for C3 and S4 Chuan Liu via B4 Relay
2025-04-15 2:45 ` [PATCH v3 1/7] soc: amlogic: clk-measure: Define MSR_CLK's register offset separately Chuan Liu via B4 Relay
2025-04-15 2:45 ` [PATCH v3 2/7] dt-bindings: soc: amlogic: C3 supports clk-measure Chuan Liu via B4 Relay
@ 2025-04-15 2:45 ` Chuan Liu via B4 Relay
2025-04-15 2:45 ` [PATCH v3 4/7] soc: amlogic: clk-measure: Add support for C3 Chuan Liu via B4 Relay
` (5 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Chuan Liu via B4 Relay @ 2025-04-15 2:45 UTC (permalink / raw)
To: Neil Armstrong, Kevin Hilman, Jerome Brunet, Martin Blumenstingl,
Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-kernel, linux-amlogic, linux-kernel, devicetree, Chuan Liu
From: Chuan Liu <chuan.liu@amlogic.com>
S4 adds support for clk-measure.
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
---
.../devicetree/bindings/soc/amlogic/amlogic,meson-gx-clk-measure.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-clk-measure.yaml b/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-clk-measure.yaml
index 275afe7fe374..39d4637c2d08 100644
--- a/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-clk-measure.yaml
+++ b/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-clk-measure.yaml
@@ -23,6 +23,7 @@ properties:
- amlogic,meson-g12a-clk-measure
- amlogic,meson-sm1-clk-measure
- amlogic,c3-clk-measure
+ - amlogic,s4-clk-measure
reg:
maxItems: 1
--
2.42.0
_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v3 4/7] soc: amlogic: clk-measure: Add support for C3
2025-04-15 2:45 [PATCH v3 0/7] soc: amlogic: clk-measure: Add clk-measure support for C3 and S4 Chuan Liu via B4 Relay
` (2 preceding siblings ...)
2025-04-15 2:45 ` [PATCH v3 3/7] dt-bindings: soc: amlogic: S4 " Chuan Liu via B4 Relay
@ 2025-04-15 2:45 ` Chuan Liu via B4 Relay
2025-04-15 2:45 ` [PATCH v3 5/7] soc: amlogic: clk-measure: Add support for S4 Chuan Liu via B4 Relay
` (4 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Chuan Liu via B4 Relay @ 2025-04-15 2:45 UTC (permalink / raw)
To: Neil Armstrong, Kevin Hilman, Jerome Brunet, Martin Blumenstingl,
Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-kernel, linux-amlogic, linux-kernel, devicetree, Chuan Liu
From: Chuan Liu <chuan.liu@amlogic.com>
Add the clk-measurer clocks IDs for the Amlogic C3 SoC family.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
---
drivers/soc/amlogic/meson-clk-measure.c | 157 ++++++++++++++++++++++++++++++++
1 file changed, 157 insertions(+)
diff --git a/drivers/soc/amlogic/meson-clk-measure.c b/drivers/soc/amlogic/meson-clk-measure.c
index 3594ef5b7ff0..dfbc34a976dc 100644
--- a/drivers/soc/amlogic/meson-clk-measure.c
+++ b/drivers/soc/amlogic/meson-clk-measure.c
@@ -494,6 +494,146 @@ static const struct meson_msr_id clk_msr_sm1[] = {
CLK_MSR_ID(127, "csi2_data"),
};
+static const struct meson_msr_id clk_msr_c3[] = {
+ CLK_MSR_ID(0, "sys_clk"),
+ CLK_MSR_ID(1, "axi_clk"),
+ CLK_MSR_ID(2, "rtc_clk"),
+ CLK_MSR_ID(3, "p20_usb2_ckout"),
+ CLK_MSR_ID(4, "eth_mpll_test"),
+ CLK_MSR_ID(5, "sys_pll"),
+ CLK_MSR_ID(6, "cpu_clk_div16"),
+ CLK_MSR_ID(7, "ts_pll"),
+ CLK_MSR_ID(8, "fclk_div2"),
+ CLK_MSR_ID(9, "fclk_div2p5"),
+ CLK_MSR_ID(10, "fclk_div3"),
+ CLK_MSR_ID(11, "fclk_div4"),
+ CLK_MSR_ID(12, "fclk_div5"),
+ CLK_MSR_ID(13, "fclk_div7"),
+ CLK_MSR_ID(15, "fclk_50m"),
+ CLK_MSR_ID(16, "sys_oscin32k_i"),
+ CLK_MSR_ID(17, "mclk_pll"),
+ CLK_MSR_ID(19, "hifi_pll"),
+ CLK_MSR_ID(20, "gp0_pll"),
+ CLK_MSR_ID(21, "gp1_pll"),
+ CLK_MSR_ID(22, "eth_mppll_50m_ckout"),
+ CLK_MSR_ID(23, "sys_pll_div16"),
+ CLK_MSR_ID(24, "ddr_dpll_pt_clk"),
+ CLK_MSR_ID(26, "nna_core"),
+ CLK_MSR_ID(27, "rtc_sec_pulse_out"),
+ CLK_MSR_ID(28, "rtc_osc_clk_out"),
+ CLK_MSR_ID(29, "debug_in_clk"),
+ CLK_MSR_ID(30, "mod_eth_phy_ref_clk"),
+ CLK_MSR_ID(31, "mod_eth_tx_clk"),
+ CLK_MSR_ID(32, "eth_125m"),
+ CLK_MSR_ID(33, "eth_rmii"),
+ CLK_MSR_ID(34, "co_clkin_to_mac"),
+ CLK_MSR_ID(36, "co_rx_clk"),
+ CLK_MSR_ID(37, "co_tx_clk"),
+ CLK_MSR_ID(38, "eth_phy_rxclk"),
+ CLK_MSR_ID(39, "eth_phy_plltxclk"),
+ CLK_MSR_ID(40, "ephy_test_clk"),
+ CLK_MSR_ID(66, "vapb"),
+ CLK_MSR_ID(67, "ge2d"),
+ CLK_MSR_ID(68, "dewarpa"),
+ CLK_MSR_ID(70, "mipi_dsi_meas"),
+ CLK_MSR_ID(71, "dsi_phy"),
+ CLK_MSR_ID(79, "rama"),
+ CLK_MSR_ID(94, "vc9000e_core"),
+ CLK_MSR_ID(95, "vc9000e_sys"),
+ CLK_MSR_ID(96, "vc9000e_aclk"),
+ CLK_MSR_ID(97, "hcodec"),
+ CLK_MSR_ID(106, "deskew_pll_clk_div32_out"),
+ CLK_MSR_ID(107, "mipi_csi_phy_clk_out[0]"),
+ CLK_MSR_ID(108, "mipi_csi_phy_clk_out[1]"),
+ CLK_MSR_ID(110, "spifc"),
+ CLK_MSR_ID(111, "saradc"),
+ CLK_MSR_ID(112, "ts"),
+ CLK_MSR_ID(113, "sd_emmc_c"),
+ CLK_MSR_ID(114, "sd_emmc_b"),
+ CLK_MSR_ID(115, "sd_emmc_a"),
+ CLK_MSR_ID(116, "gpio_msr_clk"),
+ CLK_MSR_ID(117, "spicc_b"),
+ CLK_MSR_ID(118, "spicc_a"),
+ CLK_MSR_ID(122, "mod_audio_pdm_dclk_o"),
+ CLK_MSR_ID(124, "o_earcrx_dmac_clk"),
+ CLK_MSR_ID(125, "o_earcrx_cmdc_clk"),
+ CLK_MSR_ID(126, "o_earctx_dmac_clk"),
+ CLK_MSR_ID(127, "o_earctx_cmdc_clk"),
+ CLK_MSR_ID(128, "o_tohdmitx_bclk"),
+ CLK_MSR_ID(129, "o_tohdmitx_mclk"),
+ CLK_MSR_ID(130, "o_tohdmitx_spdif_clk"),
+ CLK_MSR_ID(131, "o_toacodec_bclk"),
+ CLK_MSR_ID(132, "o_toacodec_mclk"),
+ CLK_MSR_ID(133, "o_spdifout_b_mst_clk"),
+ CLK_MSR_ID(134, "o_spdifout_mst_clk"),
+ CLK_MSR_ID(135, "o_spdifin_mst_clk"),
+ CLK_MSR_ID(136, "o_audio_mclk"),
+ CLK_MSR_ID(137, "o_vad_clk"),
+ CLK_MSR_ID(138, "o_tdmout_d_sclk"),
+ CLK_MSR_ID(139, "o_tdmout_c_sclk"),
+ CLK_MSR_ID(140, "o_tdmout_b_sclk"),
+ CLK_MSR_ID(141, "o_tdmout_a_sclk"),
+ CLK_MSR_ID(142, "o_tdminb_1b_sclk"),
+ CLK_MSR_ID(143, "o_tdmin_1b_sclk"),
+ CLK_MSR_ID(144, "o_tdmin_d_sclk"),
+ CLK_MSR_ID(145, "o_tdmin_c_sclk"),
+ CLK_MSR_ID(146, "o_tdmin_b_sclk"),
+ CLK_MSR_ID(147, "o_tdmin_a_sclk"),
+ CLK_MSR_ID(148, "o_resampleb_clk"),
+ CLK_MSR_ID(149, "o_resamplea_clk"),
+ CLK_MSR_ID(150, "o_pdmb_sysclk"),
+ CLK_MSR_ID(151, "o_pdmb_dclk"),
+ CLK_MSR_ID(152, "o_pdm_sysclk"),
+ CLK_MSR_ID(153, "o_pdm_dclk"),
+ CLK_MSR_ID(154, "c_alockerb_out_clk"),
+ CLK_MSR_ID(155, "c_alockerb_in_clk"),
+ CLK_MSR_ID(156, "c_alocker_out_clk"),
+ CLK_MSR_ID(157, "c_alocker_in_clk"),
+ CLK_MSR_ID(158, "audio_mst_clk[34]"),
+ CLK_MSR_ID(159, "audio_mst_clk[35]"),
+ CLK_MSR_ID(160, "pwm_n"),
+ CLK_MSR_ID(161, "pwm_m"),
+ CLK_MSR_ID(162, "pwm_l"),
+ CLK_MSR_ID(163, "pwm_k"),
+ CLK_MSR_ID(164, "pwm_j"),
+ CLK_MSR_ID(165, "pwm_i"),
+ CLK_MSR_ID(166, "pwm_h"),
+ CLK_MSR_ID(167, "pwm_g"),
+ CLK_MSR_ID(168, "pwm_f"),
+ CLK_MSR_ID(169, "pwm_e"),
+ CLK_MSR_ID(170, "pwm_d"),
+ CLK_MSR_ID(171, "pwm_c"),
+ CLK_MSR_ID(172, "pwm_b"),
+ CLK_MSR_ID(173, "pwm_a"),
+ CLK_MSR_ID(174, "AU_DAC1_CLK_TO_GPIO"),
+ CLK_MSR_ID(175, "AU_ADC_CLK_TO_GPIO"),
+ CLK_MSR_ID(176, "rng_ring_osc_clk[0]"),
+ CLK_MSR_ID(177, "rng_ring_osc_clk[1]"),
+ CLK_MSR_ID(178, "rng_ring_osc_clk[2]"),
+ CLK_MSR_ID(179, "rng_ring_osc_clk[3]"),
+ CLK_MSR_ID(180, "sys_cpu_ring_osc_clk[0]"),
+ CLK_MSR_ID(181, "sys_cpu_ring_osc_clk[1]"),
+ CLK_MSR_ID(182, "sys_cpu_ring_osc_clk[2]"),
+ CLK_MSR_ID(183, "sys_cpu_ring_osc_clk[3]"),
+ CLK_MSR_ID(184, "sys_cpu_ring_osc_clk[4]"),
+ CLK_MSR_ID(185, "sys_cpu_ring_osc_clk[5]"),
+ CLK_MSR_ID(186, "sys_cpu_ring_osc_clk[6]"),
+ CLK_MSR_ID(187, "sys_cpu_ring_osc_clk[7]"),
+ CLK_MSR_ID(188, "sys_cpu_ring_osc_clk[8]"),
+ CLK_MSR_ID(189, "sys_cpu_ring_osc_clk[9]"),
+ CLK_MSR_ID(190, "sys_cpu_ring_osc_clk[10]"),
+ CLK_MSR_ID(191, "sys_cpu_ring_osc_clk[11]"),
+ CLK_MSR_ID(192, "am_ring_osc_clk_out[12](dmc)"),
+ CLK_MSR_ID(193, "am_ring_osc_clk_out[13](rama)"),
+ CLK_MSR_ID(194, "am_ring_osc_clk_out[14](nna)"),
+ CLK_MSR_ID(195, "am_ring_osc_clk_out[15](nna)"),
+ CLK_MSR_ID(200, "rng_ring_osc_clk_1[0]"),
+ CLK_MSR_ID(201, "rng_ring_osc_clk_1[1]"),
+ CLK_MSR_ID(202, "rng_ring_osc_clk_1[2]"),
+ CLK_MSR_ID(203, "rng_ring_osc_clk_1[3]"),
+
+};
+
static int meson_measure_id(struct meson_msr_id *clk_msr_id,
unsigned int duration)
{
@@ -714,6 +854,19 @@ static const struct meson_msr_data clk_msr_sm1_data = {
.reg = &msr_reg_offset,
};
+static const struct msr_reg_offset msr_reg_offset_v2 = {
+ .freq_ctrl = 0x0,
+ .duty_ctrl = 0x4,
+ .freq_val = 0x8,
+ .duty_val = 0x18,
+};
+
+static const struct meson_msr_data clk_msr_c3_data = {
+ .msr_table = (void *)clk_msr_c3,
+ .msr_count = ARRAY_SIZE(clk_msr_c3),
+ .reg = &msr_reg_offset_v2,
+};
+
static const struct of_device_id meson_msr_match_table[] = {
{
.compatible = "amlogic,meson-gx-clk-measure",
@@ -739,6 +892,10 @@ static const struct of_device_id meson_msr_match_table[] = {
.compatible = "amlogic,meson-sm1-clk-measure",
.data = &clk_msr_sm1_data,
},
+ {
+ .compatible = "amlogic,c3-clk-measure",
+ .data = &clk_msr_c3_data,
+ },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, meson_msr_match_table);
--
2.42.0
_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v3 5/7] soc: amlogic: clk-measure: Add support for S4
2025-04-15 2:45 [PATCH v3 0/7] soc: amlogic: clk-measure: Add clk-measure support for C3 and S4 Chuan Liu via B4 Relay
` (3 preceding siblings ...)
2025-04-15 2:45 ` [PATCH v3 4/7] soc: amlogic: clk-measure: Add support for C3 Chuan Liu via B4 Relay
@ 2025-04-15 2:45 ` Chuan Liu via B4 Relay
2025-04-15 2:45 ` [PATCH v3 6/7] arm64: dts: amlogic: C3: Add clk-measure controller node Chuan Liu via B4 Relay
` (3 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Chuan Liu via B4 Relay @ 2025-04-15 2:45 UTC (permalink / raw)
To: Neil Armstrong, Kevin Hilman, Jerome Brunet, Martin Blumenstingl,
Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-kernel, linux-amlogic, linux-kernel, devicetree, Chuan Liu
From: Chuan Liu <chuan.liu@amlogic.com>
Add the clk-measurer clocks IDs for the Amlogic S4 SoC family.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
---
drivers/soc/amlogic/meson-clk-measure.c | 163 ++++++++++++++++++++++++++++++++
1 file changed, 163 insertions(+)
diff --git a/drivers/soc/amlogic/meson-clk-measure.c b/drivers/soc/amlogic/meson-clk-measure.c
index dfbc34a976dc..d862e30a244e 100644
--- a/drivers/soc/amlogic/meson-clk-measure.c
+++ b/drivers/soc/amlogic/meson-clk-measure.c
@@ -634,6 +634,159 @@ static const struct meson_msr_id clk_msr_c3[] = {
};
+static const struct meson_msr_id clk_msr_s4[] = {
+ CLK_MSR_ID(0, "sys_clk"),
+ CLK_MSR_ID(1, "axi_clk"),
+ CLK_MSR_ID(2, "rtc_clk"),
+ CLK_MSR_ID(5, "mali"),
+ CLK_MSR_ID(6, "cpu_clk_div16"),
+ CLK_MSR_ID(7, "ceca_clk"),
+ CLK_MSR_ID(8, "cecb_clk"),
+ CLK_MSR_ID(10, "fclk_div5"),
+ CLK_MSR_ID(11, "mpll0"),
+ CLK_MSR_ID(12, "mpll1"),
+ CLK_MSR_ID(13, "mpll2"),
+ CLK_MSR_ID(14, "mpll3"),
+ CLK_MSR_ID(15, "fclk_50m"),
+ CLK_MSR_ID(16, "pcie_clk_inp"),
+ CLK_MSR_ID(17, "pcie_clk_inn"),
+ CLK_MSR_ID(18, "mpll_clk_test_out"),
+ CLK_MSR_ID(19, "hifi_pll"),
+ CLK_MSR_ID(20, "gp0_pll"),
+ CLK_MSR_ID(21, "gp1_pll"),
+ CLK_MSR_ID(22, "eth_mppll_50m_ckout"),
+ CLK_MSR_ID(23, "sys_pll_div16"),
+ CLK_MSR_ID(24, "ddr_dpll_pt_clk"),
+ CLK_MSR_ID(30, "mod_eth_phy_ref_clk"),
+ CLK_MSR_ID(31, "mod_eth_tx_clk"),
+ CLK_MSR_ID(32, "eth_125m"),
+ CLK_MSR_ID(33, "eth_rmii"),
+ CLK_MSR_ID(34, "co_clkin_to_mac"),
+ CLK_MSR_ID(35, "mod_eth_rx_clk_rmii"),
+ CLK_MSR_ID(36, "co_rx_clk"),
+ CLK_MSR_ID(37, "co_tx_clk"),
+ CLK_MSR_ID(38, "eth_phy_rxclk"),
+ CLK_MSR_ID(39, "eth_phy_plltxclk"),
+ CLK_MSR_ID(40, "ephy_test_clk"),
+ CLK_MSR_ID(50, "vid_pll_div_clk_out"),
+ CLK_MSR_ID(51, "enci"),
+ CLK_MSR_ID(52, "encp"),
+ CLK_MSR_ID(53, "encl"),
+ CLK_MSR_ID(54, "vdac"),
+ CLK_MSR_ID(55, "cdac_clk_c"),
+ CLK_MSR_ID(56, "mod_tcon_clko"),
+ CLK_MSR_ID(57, "lcd_an_clk_ph2"),
+ CLK_MSR_ID(58, "lcd_an_clk_ph3"),
+ CLK_MSR_ID(59, "hdmitx_pixel"),
+ CLK_MSR_ID(60, "vdin_meas"),
+ CLK_MSR_ID(61, "vpu"),
+ CLK_MSR_ID(62, "vpu_clkb"),
+ CLK_MSR_ID(63, "vpu_clkb_tmp"),
+ CLK_MSR_ID(64, "vpu_clkc"),
+ CLK_MSR_ID(65, "vid_lock"),
+ CLK_MSR_ID(66, "vapb"),
+ CLK_MSR_ID(67, "ge2d"),
+ CLK_MSR_ID(68, "cts_hdcp22_esmclk"),
+ CLK_MSR_ID(69, "cts_hdcp22_skpclk"),
+ CLK_MSR_ID(76, "hdmitx_tmds"),
+ CLK_MSR_ID(77, "hdmitx_sys_clk"),
+ CLK_MSR_ID(78, "hdmitx_fe_clk"),
+ CLK_MSR_ID(79, "rama"),
+ CLK_MSR_ID(93, "vdec"),
+ CLK_MSR_ID(99, "hevcf"),
+ CLK_MSR_ID(100, "demod_core"),
+ CLK_MSR_ID(101, "adc_extclk_in"),
+ CLK_MSR_ID(102, "cts_demod_core_t2_clk"),
+ CLK_MSR_ID(103, "adc_dpll_intclk"),
+ CLK_MSR_ID(104, "adc_dpll_clk_b3"),
+ CLK_MSR_ID(105, "s2_adc_clk"),
+ CLK_MSR_ID(106, "deskew_pll_clk_div32_out"),
+ CLK_MSR_ID(110, "sc"),
+ CLK_MSR_ID(111, "sar_adc"),
+ CLK_MSR_ID(113, "sd_emmc_c"),
+ CLK_MSR_ID(114, "sd_emmc_b"),
+ CLK_MSR_ID(115, "sd_emmc_a"),
+ CLK_MSR_ID(116, "gpio_msr_clk"),
+ CLK_MSR_ID(118, "spicc0"),
+ CLK_MSR_ID(121, "ts"),
+ CLK_MSR_ID(130, "audio_vad_clk"),
+ CLK_MSR_ID(131, "acodec_dac_clk_x128"),
+ CLK_MSR_ID(132, "audio_locker_in_clk"),
+ CLK_MSR_ID(133, "audio_locker_out_clk"),
+ CLK_MSR_ID(134, "audio_tdmout_c_sclk"),
+ CLK_MSR_ID(135, "audio_tdmout_b_sclk"),
+ CLK_MSR_ID(136, "audio_tdmout_a_sclk"),
+ CLK_MSR_ID(137, "audio_tdmin_lb_sclk"),
+ CLK_MSR_ID(138, "audio_tdmin_c_sclk"),
+ CLK_MSR_ID(139, "audio_tdmin_b_sclk"),
+ CLK_MSR_ID(140, "audio_tdmin_a_sclk"),
+ CLK_MSR_ID(141, "audio_resamplea_clk"),
+ CLK_MSR_ID(142, "audio_pdm_sysclk"),
+ CLK_MSR_ID(143, "audio_spdifout_b_mst_clk"),
+ CLK_MSR_ID(144, "audio_spdifout_mst_clk"),
+ CLK_MSR_ID(145, "audio_spdifin_mst_clk"),
+ CLK_MSR_ID(146, "audio_pdm_dclk"),
+ CLK_MSR_ID(147, "audio_resampleb_clk"),
+ CLK_MSR_ID(160, "pwm_j"),
+ CLK_MSR_ID(161, "pwm_i"),
+ CLK_MSR_ID(162, "pwm_h"),
+ CLK_MSR_ID(163, "pwm_g"),
+ CLK_MSR_ID(164, "pwm_f"),
+ CLK_MSR_ID(165, "pwm_e"),
+ CLK_MSR_ID(166, "pwm_d"),
+ CLK_MSR_ID(167, "pwm_c"),
+ CLK_MSR_ID(168, "pwm_b"),
+ CLK_MSR_ID(169, "pwm_a"),
+ CLK_MSR_ID(176, "rng_ring_0"),
+ CLK_MSR_ID(177, "rng_ring_1"),
+ CLK_MSR_ID(178, "rng_ring_2"),
+ CLK_MSR_ID(179, "rng_ring_3"),
+ CLK_MSR_ID(180, "dmc_osc_ring(LVT16)"),
+ CLK_MSR_ID(181, "gpu_osc_ring0(LVT16)"),
+ CLK_MSR_ID(182, "gpu_osc_ring1(ULVT16)"),
+ CLK_MSR_ID(183, "gpu_osc_ring2(SLVT16)"),
+ CLK_MSR_ID(184, "vpu_osc_ring0(SVT24)"),
+ CLK_MSR_ID(185, "vpu_osc_ring1(LVT20)"),
+ CLK_MSR_ID(186, "vpu_osc_ring2(LVT16)"),
+ CLK_MSR_ID(187, "dos_osc_ring0(SVT24)"),
+ CLK_MSR_ID(188, "dos_osc_ring1(SVT16)"),
+ CLK_MSR_ID(189, "dos_osc_ring2(LVT16)"),
+ CLK_MSR_ID(190, "dos_osc_ring3(ULVT20)"),
+ CLK_MSR_ID(192, "axi_sram_osc_ring(SVT16)"),
+ CLK_MSR_ID(193, "demod_osc_ring0"),
+ CLK_MSR_ID(194, "demod_osc_ring1"),
+ CLK_MSR_ID(195, "sar_osc_ring"),
+ CLK_MSR_ID(196, "sys_cpu_osc_ring0"),
+ CLK_MSR_ID(197, "sys_cpu_osc_ring1"),
+ CLK_MSR_ID(198, "sys_cpu_osc_ring2"),
+ CLK_MSR_ID(199, "sys_cpu_osc_ring3"),
+ CLK_MSR_ID(200, "sys_cpu_osc_ring4"),
+ CLK_MSR_ID(201, "sys_cpu_osc_ring5"),
+ CLK_MSR_ID(202, "sys_cpu_osc_ring6"),
+ CLK_MSR_ID(203, "sys_cpu_osc_ring7"),
+ CLK_MSR_ID(204, "sys_cpu_osc_ring8"),
+ CLK_MSR_ID(205, "sys_cpu_osc_ring9"),
+ CLK_MSR_ID(206, "sys_cpu_osc_ring10"),
+ CLK_MSR_ID(207, "sys_cpu_osc_ring11"),
+ CLK_MSR_ID(208, "sys_cpu_osc_ring12"),
+ CLK_MSR_ID(209, "sys_cpu_osc_ring13"),
+ CLK_MSR_ID(210, "sys_cpu_osc_ring14"),
+ CLK_MSR_ID(211, "sys_cpu_osc_ring15"),
+ CLK_MSR_ID(212, "sys_cpu_osc_ring16"),
+ CLK_MSR_ID(213, "sys_cpu_osc_ring17"),
+ CLK_MSR_ID(214, "sys_cpu_osc_ring18"),
+ CLK_MSR_ID(215, "sys_cpu_osc_ring19"),
+ CLK_MSR_ID(216, "sys_cpu_osc_ring20"),
+ CLK_MSR_ID(217, "sys_cpu_osc_ring21"),
+ CLK_MSR_ID(218, "sys_cpu_osc_ring22"),
+ CLK_MSR_ID(219, "sys_cpu_osc_ring23"),
+ CLK_MSR_ID(220, "sys_cpu_osc_ring24"),
+ CLK_MSR_ID(221, "sys_cpu_osc_ring25"),
+ CLK_MSR_ID(222, "sys_cpu_osc_ring26"),
+ CLK_MSR_ID(223, "sys_cpu_osc_ring27"),
+
+};
+
static int meson_measure_id(struct meson_msr_id *clk_msr_id,
unsigned int duration)
{
@@ -867,6 +1020,12 @@ static const struct meson_msr_data clk_msr_c3_data = {
.reg = &msr_reg_offset_v2,
};
+static const struct meson_msr_data clk_msr_s4_data = {
+ .msr_table = (void *)clk_msr_s4,
+ .msr_count = ARRAY_SIZE(clk_msr_s4),
+ .reg = &msr_reg_offset_v2,
+};
+
static const struct of_device_id meson_msr_match_table[] = {
{
.compatible = "amlogic,meson-gx-clk-measure",
@@ -896,6 +1055,10 @@ static const struct of_device_id meson_msr_match_table[] = {
.compatible = "amlogic,c3-clk-measure",
.data = &clk_msr_c3_data,
},
+ {
+ .compatible = "amlogic,s4-clk-measure",
+ .data = &clk_msr_s4_data,
+ },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, meson_msr_match_table);
--
2.42.0
_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v3 6/7] arm64: dts: amlogic: C3: Add clk-measure controller node
2025-04-15 2:45 [PATCH v3 0/7] soc: amlogic: clk-measure: Add clk-measure support for C3 and S4 Chuan Liu via B4 Relay
` (4 preceding siblings ...)
2025-04-15 2:45 ` [PATCH v3 5/7] soc: amlogic: clk-measure: Add support for S4 Chuan Liu via B4 Relay
@ 2025-04-15 2:45 ` Chuan Liu via B4 Relay
2025-04-15 2:45 ` [PATCH v3 7/7] arm64: dts: amlogic: S4: " Chuan Liu via B4 Relay
` (2 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Chuan Liu via B4 Relay @ 2025-04-15 2:45 UTC (permalink / raw)
To: Neil Armstrong, Kevin Hilman, Jerome Brunet, Martin Blumenstingl,
Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-kernel, linux-amlogic, linux-kernel, devicetree, Chuan Liu
From: Chuan Liu <chuan.liu@amlogic.com>
Add the clk-measure controller node for C3 SoC family.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
---
arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
index fd0e557eba06..cb9ea3ca6ee0 100644
--- a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
+++ b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
@@ -760,6 +760,11 @@ internal_ephy: ethernet_phy@8 {
};
};
+ clk_msr: clock-measure@48000 {
+ compatible = "amlogic,c3-clk-measure";
+ reg = <0x0 0x48000 0x0 0x1c>;
+ };
+
spicc0: spi@50000 {
compatible = "amlogic,meson-g12a-spicc";
reg = <0x0 0x50000 0x0 0x44>;
--
2.42.0
_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v3 7/7] arm64: dts: amlogic: S4: Add clk-measure controller node
2025-04-15 2:45 [PATCH v3 0/7] soc: amlogic: clk-measure: Add clk-measure support for C3 and S4 Chuan Liu via B4 Relay
` (5 preceding siblings ...)
2025-04-15 2:45 ` [PATCH v3 6/7] arm64: dts: amlogic: C3: Add clk-measure controller node Chuan Liu via B4 Relay
@ 2025-04-15 2:45 ` Chuan Liu via B4 Relay
2025-04-22 7:29 ` (subset) [PATCH v3 0/7] soc: amlogic: clk-measure: Add clk-measure support for C3 and S4 Neil Armstrong
2025-04-22 7:32 ` Neil Armstrong
8 siblings, 0 replies; 11+ messages in thread
From: Chuan Liu via B4 Relay @ 2025-04-15 2:45 UTC (permalink / raw)
To: Neil Armstrong, Kevin Hilman, Jerome Brunet, Martin Blumenstingl,
Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-kernel, linux-amlogic, linux-kernel, devicetree, Chuan Liu
From: Chuan Liu <chuan.liu@amlogic.com>
Add the clk-measure controller node for S4 SoC family.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
---
arch/arm64/boot/dts/amlogic/meson-s4.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
index 957577d986c0..9d99ed2994df 100644
--- a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
@@ -629,6 +629,11 @@ internal_ephy: ethernet-phy@8 {
};
};
+ clk_msr: clock-measure@48000 {
+ compatible = "amlogic,s4-clk-measure";
+ reg = <0x0 0x48000 0x0 0x1c>;
+ };
+
spicc0: spi@50000 {
compatible = "amlogic,meson-g12a-spicc";
reg = <0x0 0x50000 0x0 0x44>;
--
2.42.0
_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v3 2/7] dt-bindings: soc: amlogic: C3 supports clk-measure
2025-04-15 2:45 ` [PATCH v3 2/7] dt-bindings: soc: amlogic: C3 supports clk-measure Chuan Liu via B4 Relay
@ 2025-04-15 4:31 ` Rob Herring (Arm)
0 siblings, 0 replies; 11+ messages in thread
From: Rob Herring (Arm) @ 2025-04-15 4:31 UTC (permalink / raw)
To: Chuan Liu
Cc: Krzysztof Kozlowski, Neil Armstrong, Kevin Hilman, linux-amlogic,
Conor Dooley, Martin Blumenstingl, devicetree, linux-arm-kernel,
linux-kernel, Jerome Brunet
On Tue, 15 Apr 2025 10:45:25 +0800, Chuan Liu wrote:
> C3 adds support for clk-measure.
>
> Acked-by: Rob Herring (Arm) <robh@kernel.org>
> Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
> ---
> .../devicetree/bindings/soc/amlogic/amlogic,meson-gx-clk-measure.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
My bot found errors running 'make dt_binding_check' on your patch:
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc/fsl/fsl,ls1028a-reset.yaml: maintainers:0: 'Frank Li' does not match '@'
from schema $id: http://devicetree.org/meta-schemas/base.yaml#
doc reference errors (make refcheckdocs):
Documentation/userspace-api/netlink/netlink-raw.rst: :doc:`rt_link<../../networking/netlink_spec/rt_link>`
Warning: Documentation/arch/powerpc/cxl.rst references a file that doesn't exist: Documentation/ABI/testing/sysfs-class-cxl
Warning: MAINTAINERS references a file that doesn't exist: Documentation/devicetree/bindings/misc/fsl,qoriq-mc.txt
Warning: lib/Kconfig.debug references a file that doesn't exist: Documentation/dev-tools/fault-injection/fault-injection.rst
Documentation/userspace-api/netlink/netlink-raw.rst: :doc:`rt_link<../../networking/netlink_spec/rt_link>`
Documentation/arch/powerpc/cxl.rst: Documentation/ABI/testing/sysfs-class-cxl
MAINTAINERS: Documentation/devicetree/bindings/misc/fsl,qoriq-mc.txt
lib/Kconfig.debug: Documentation/dev-tools/fault-injection/fault-injection.rst
See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250415-clk-measure-v3-2-9b8551dd33b4@amlogic.com
The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.
_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: (subset) [PATCH v3 0/7] soc: amlogic: clk-measure: Add clk-measure support for C3 and S4
2025-04-15 2:45 [PATCH v3 0/7] soc: amlogic: clk-measure: Add clk-measure support for C3 and S4 Chuan Liu via B4 Relay
` (6 preceding siblings ...)
2025-04-15 2:45 ` [PATCH v3 7/7] arm64: dts: amlogic: S4: " Chuan Liu via B4 Relay
@ 2025-04-22 7:29 ` Neil Armstrong
2025-04-22 7:32 ` Neil Armstrong
8 siblings, 0 replies; 11+ messages in thread
From: Neil Armstrong @ 2025-04-22 7:29 UTC (permalink / raw)
To: Kevin Hilman, Jerome Brunet, Martin Blumenstingl, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Chuan Liu
Cc: linux-arm-kernel, linux-amlogic, linux-kernel, devicetree
Hi,
On Tue, 15 Apr 2025 10:45:23 +0800, Chuan Liu wrote:
> Add clk-measure support for C3/S4 SoCs.
>
>
Thanks, Applied to https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux.git (v6.16/drivers)
[1/7] soc: amlogic: clk-measure: Define MSR_CLK's register offset separately
https://git.kernel.org/amlogic/c/ac2edb9b7bcc34de804d9c034d7387bdeda3fa3d
[2/7] dt-bindings: soc: amlogic: C3 supports clk-measure
https://git.kernel.org/amlogic/c/e5635febb4f063fba40bcb4506c7fa5704ceeace
[3/7] dt-bindings: soc: amlogic: S4 supports clk-measure
https://git.kernel.org/amlogic/c/97533fc48892716e5765b390b2f03a7ac633c55b
[4/7] soc: amlogic: clk-measure: Add support for C3
https://git.kernel.org/amlogic/c/67c618a5852d9066ccb3b6833df8c44839bff5c1
[5/7] soc: amlogic: clk-measure: Add support for S4
https://git.kernel.org/amlogic/c/bc93a99ba90b06e478a21505d07175a0f66849be
These changes has been applied on the intermediate git tree [1].
The v6.16/drivers branch will then be sent via a formal Pull Request to the Linux SoC maintainers
for inclusion in their intermediate git branches in order to be sent to Linus during
the next merge window, or sooner if it's a set of fixes.
In the cases of fixes, those will be merged in the current release candidate
kernel and as soon they appear on the Linux master branch they will be
backported to the previous Stable and Long-Stable kernels [2].
The intermediate git branches are merged daily in the linux-next tree [3],
people are encouraged testing these pre-release kernels and report issues on the
relevant mailing-lists.
If problems are discovered on those changes, please submit a signed-off-by revert
patch followed by a corrective changeset.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux.git
[2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
[3] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
--
Neil
_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: (subset) [PATCH v3 0/7] soc: amlogic: clk-measure: Add clk-measure support for C3 and S4
2025-04-15 2:45 [PATCH v3 0/7] soc: amlogic: clk-measure: Add clk-measure support for C3 and S4 Chuan Liu via B4 Relay
` (7 preceding siblings ...)
2025-04-22 7:29 ` (subset) [PATCH v3 0/7] soc: amlogic: clk-measure: Add clk-measure support for C3 and S4 Neil Armstrong
@ 2025-04-22 7:32 ` Neil Armstrong
8 siblings, 0 replies; 11+ messages in thread
From: Neil Armstrong @ 2025-04-22 7:32 UTC (permalink / raw)
To: Kevin Hilman, Jerome Brunet, Martin Blumenstingl, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Chuan Liu
Cc: linux-arm-kernel, linux-amlogic, linux-kernel, devicetree
Hi,
On Tue, 15 Apr 2025 10:45:23 +0800, Chuan Liu wrote:
> Add clk-measure support for C3/S4 SoCs.
>
>
Thanks, Applied to https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux.git (v6.16/arm64-dt)
[6/7] arm64: dts: amlogic: C3: Add clk-measure controller node
https://git.kernel.org/amlogic/c/72e295292d3d1522d3ce628d07ef6a924e112b73
[7/7] arm64: dts: amlogic: S4: Add clk-measure controller node
https://git.kernel.org/amlogic/c/0d057d35f3714e6786013772c830a976c2530894
These changes has been applied on the intermediate git tree [1].
The v6.16/arm64-dt branch will then be sent via a formal Pull Request to the Linux SoC maintainers
for inclusion in their intermediate git branches in order to be sent to Linus during
the next merge window, or sooner if it's a set of fixes.
In the cases of fixes, those will be merged in the current release candidate
kernel and as soon they appear on the Linux master branch they will be
backported to the previous Stable and Long-Stable kernels [2].
The intermediate git branches are merged daily in the linux-next tree [3],
people are encouraged testing these pre-release kernels and report issues on the
relevant mailing-lists.
If problems are discovered on those changes, please submit a signed-off-by revert
patch followed by a corrective changeset.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux.git
[2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
[3] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
--
Neil
_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic
^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2025-04-22 8:36 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
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2025-04-15 2:45 [PATCH v3 0/7] soc: amlogic: clk-measure: Add clk-measure support for C3 and S4 Chuan Liu via B4 Relay
2025-04-15 2:45 ` [PATCH v3 1/7] soc: amlogic: clk-measure: Define MSR_CLK's register offset separately Chuan Liu via B4 Relay
2025-04-15 2:45 ` [PATCH v3 2/7] dt-bindings: soc: amlogic: C3 supports clk-measure Chuan Liu via B4 Relay
2025-04-15 4:31 ` Rob Herring (Arm)
2025-04-15 2:45 ` [PATCH v3 3/7] dt-bindings: soc: amlogic: S4 " Chuan Liu via B4 Relay
2025-04-15 2:45 ` [PATCH v3 4/7] soc: amlogic: clk-measure: Add support for C3 Chuan Liu via B4 Relay
2025-04-15 2:45 ` [PATCH v3 5/7] soc: amlogic: clk-measure: Add support for S4 Chuan Liu via B4 Relay
2025-04-15 2:45 ` [PATCH v3 6/7] arm64: dts: amlogic: C3: Add clk-measure controller node Chuan Liu via B4 Relay
2025-04-15 2:45 ` [PATCH v3 7/7] arm64: dts: amlogic: S4: " Chuan Liu via B4 Relay
2025-04-22 7:29 ` (subset) [PATCH v3 0/7] soc: amlogic: clk-measure: Add clk-measure support for C3 and S4 Neil Armstrong
2025-04-22 7:32 ` Neil Armstrong
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