Re: [PATCH 2/7] dt-bindings: clk: meson: Add Amlogic T7 fix pll support

[Jerome Brunet <jbrunet@baylibre.com>]

On mer. 18 févr. 2026 at 11:56, Ronald Claveau <linux-kernel-dev@aliel.fr> wrote:

> Add PLL for the clock controller of the Amlogic T7 SoC family.

Usually bindings changes should comes before the driver changes in a
series.

This is especially important here because you are using the IDs in the
driver. With order used here, bisect is broken.

>
> Signed-off-by: Ronald Claveau <linux-kernel-dev@aliel.fr>
> ---
>  include/dt-bindings/clock/amlogic,t7-pll-clkc.h | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
>
> diff --git a/include/dt-bindings/clock/amlogic,t7-pll-clkc.h b/include/dt-bindings/clock/amlogic,t7-pll-clkc.h
> index e2481f2f1163..690421009eab 100644
> --- a/include/dt-bindings/clock/amlogic,t7-pll-clkc.h
> +++ b/include/dt-bindings/clock/amlogic,t7-pll-clkc.h
> @@ -53,4 +53,20 @@
>  #define CLKID_MCLK_1_PRE	9
>  #define CLKID_MCLK_1		10
>  
> +/* ANALOG */
No idea what you mean with this ...

> +#define CLKID_FPLL_DCO		0
> +#define CLKID_FPLL			1
> +#define CLKID_FDIV2_DIV		2
> +#define CLKID_FDIV2			3
> +#define CLKID_FDIV2P5_DIV	4
> +#define CLKID_FDIV2P5		5
> +#define CLKID_FDIV3_DIV		6
> +#define CLKID_FDIV3			7
> +#define CLKID_FDIV4_DIV		8
> +#define CLKID_FDIV4			9
> +#define CLKID_FDIV5_DIV		10
> +#define CLKID_FDIV5			11
> +#define CLKID_FDIV7_DIV		12
> +#define CLKID_FDIV7			13
> +
>  #endif /* __T7_PLL_CLKC_H */

-- 
Jerome

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