Re: Meson GXL and Rockchip PHY based on same IP?

[Jerome Brunet <jbrunet@baylibre.com>]

On Mon 01 Aug 2022 at 03:09, Da Xue <da@lessconfused.com> wrote:

> On Sat, Jul 30, 2022 at 3:31 PM Heiner Kallweit <hkallweit1@gmail.com> wrote:
>>
>> On 30.07.2022 19:06, Martin Blumenstingl wrote:
>> > Hi Heiner,
>> >
>> > On Sat, Jul 30, 2022 at 5:59 PM Heiner Kallweit <hkallweit1@gmail.com> wrote:
>> >>
>> >> Meson GXL and Rockchip ethernet PHY drivers have quite something in common.
>> >> They share a number of non-standard registers, using the same bits
>> >> and same bank handling. This makes me think they they may be using
>> >> the same IP. However they have different quirk handling. But this
>> >> doesn't rule out that actually they would need the same quirk handling.
>> > You made me curious and I found the following public Microchip
>> > LAN83C185 datasheet: [0]
>> > Page 27 has a "SMI REGISTER MAPPING" which matches the definitions in
>> > meson-gxl.c.
>> > Also on page 33 the interrupt source bits are a 100% match with the
>> > INTSRC_* marcos in meson-gxl.c
>> >
>> Great, thanks for investigating!
>>
>> > Whether this means that:
>> > - Amlogic SoCs embed a LAN83C185
>> > - LAN83C185 is based on the same IP core (possibly not even designed
>> > by Amlogic or SMSC)
>> > - the SMI interface design is something that one hardware engineer
>> > brought from one company to another
>> > - ...something else
>> > is something I can't tell
>
> Per Jerome, both are OmniPHY IP.
>

I believe it to be the case, yes.

However, the version of the IP could be different.
The integration the SoC vendor did is very likely to be different too.

I'd be in favor of keeping things the way they are now.
I don't think merging the drivers now is really worth the effort.
With the uncertainty there is around SoC integration, It could bring more
problems that it solves down the line.

>
>> >
>> >
>> > Best regards,
>> > Martin
>> >
>> >
>> > [0] https://ww1.microchip.com/downloads/en/DeviceDoc/LAN83C185-Data-Sheet-DS00002808A.pdf
>>
>>
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