[PATCH v2 1/7] net: dt-bindings: add RGMII TX delay configuration to meson8b-dwmac

[robh@kernel.org (Rob Herring)]

On Fri, Nov 25, 2016 at 02:01:50PM +0100, Martin Blumenstingl wrote:
> This allows configuring the RGMII TX clock delay. The RGMII clock is
> generated by underlying hardware of the the Meson 8b / GXBB DWMAC glue.
> The configuration depends on the actual hardware (no delay may be
> needed due to the design of the actual circuit, the PHY might add this
> delay, etc.).
> 
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> ---
>  Documentation/devicetree/bindings/net/meson-dwmac.txt | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/net/meson-dwmac.txt b/Documentation/devicetree/bindings/net/meson-dwmac.txt
> index 89e62dd..f8bc540 100644
> --- a/Documentation/devicetree/bindings/net/meson-dwmac.txt
> +++ b/Documentation/devicetree/bindings/net/meson-dwmac.txt
> @@ -25,6 +25,20 @@ Required properties on Meson8b and newer:
>  		- "clkin0" - first parent clock of the internal mux
>  		- "clkin1" - second parent clock of the internal mux
>  
> +Optional properties on Meson8b and newer:
> +- amlogic,tx-delay-ns:	The internal RGMII TX clock delay (provided
> +			by this driver) in nanoseconds. Allowed values
> +			are: 0ns, 2ns, 4ns, 6ns.
> +			This must be configured when the phy-mode is
> +			"rgmii" (typically a value of 2ns is used in
> +			this case).
> +			When phy-mode is set to "rgmii-id" or
> +			"rgmii-txid" the TX clock delay is already
> +			provided by the PHY. In that case this
> +			property should be set to 0ns (which disables
> +			the TX clock delay in the MAC to prevent the
> +			clock from going off because both PHY and MAC
> +			are adding a delay).

What's the default? Why can't no property mean 0ns delay?

>  
>  Example for Meson6:
>  
> -- 
> 2.10.2
>