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From: jbrunet@baylibre.com (Jerome Brunet)
To: linus-amlogic@lists.infradead.org
Subject: [PATCH 4/7] clk: meson: gxbb: mpll: use rw operation
Date: Tue, 28 Feb 2017 14:29:59 +0100	[thread overview]
Message-ID: <20170228133002.17894-5-jbrunet@baylibre.com> (raw)
In-Reply-To: <20170228133002.17894-1-jbrunet@baylibre.com>

Use read/write operations for the mpll clocks instead of the
read-only ones.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
 drivers/clk/meson/gxbb.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
index 6b97f4da1708..a52063f57d00 100644
--- a/drivers/clk/meson/gxbb.c
+++ b/drivers/clk/meson/gxbb.c
@@ -459,7 +459,7 @@ static struct meson_clk_mpll gxbb_mpll0 = {
 	.lock = &clk_lock,
 	.hw.init = &(struct clk_init_data){
 		.name = "mpll0",
-		.ops = &meson_clk_mpll_ro_ops,
+		.ops = &meson_clk_mpll_ops,
 		.parent_names = (const char *[]){ "fixed_pll" },
 		.num_parents = 1,
 	},
@@ -489,7 +489,7 @@ static struct meson_clk_mpll gxbb_mpll1 = {
 	.lock = &clk_lock,
 	.hw.init = &(struct clk_init_data){
 		.name = "mpll1",
-		.ops = &meson_clk_mpll_ro_ops,
+		.ops = &meson_clk_mpll_ops,
 		.parent_names = (const char *[]){ "fixed_pll" },
 		.num_parents = 1,
 	},
@@ -519,7 +519,7 @@ static struct meson_clk_mpll gxbb_mpll2 = {
 	.lock = &clk_lock,
 	.hw.init = &(struct clk_init_data){
 		.name = "mpll2",
-		.ops = &meson_clk_mpll_ro_ops,
+		.ops = &meson_clk_mpll_ops,
 		.parent_names = (const char *[]){ "fixed_pll" },
 		.num_parents = 1,
 	},
-- 
2.9.3

  parent reply	other threads:[~2017-02-28 13:29 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-02-28 13:29 [PATCH 0/7] clk: meson: update clock controller for audio support Jerome Brunet
2017-02-28 13:29 ` [PATCH 1/7] clk: meson8b: put dividers and muxes in tables Jerome Brunet
2017-02-28 13:29 ` [PATCH 2/7] clk: gxbb: " Jerome Brunet
2017-02-28 13:29 ` [PATCH 3/7] clk: meson: mpll: add rw operation Jerome Brunet
2017-02-28 13:29 ` Jerome Brunet [this message]
2017-02-28 13:30 ` [PATCH 5/7] clk: meson8b: add the mplls clocks 0, 1 and 2 Jerome Brunet
2017-02-28 13:30 ` [PATCH 6/7] clk: meson: mpll: correct N2 maximum value Jerome Brunet
2017-02-28 13:30 ` [PATCH 7/7] dt-bindings: clk: gxbb: expose i2s output clock gates Jerome Brunet

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