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From: sashiko-bot@kernel.org
To: "Ronald Claveau" <linux-kernel-dev@aliel.fr>
Cc: robh@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org,
	neil.armstrong@linaro.org, linux-amlogic@lists.infradead.org
Subject: Re: [PATCH 1/3] dt-bindings: pwm: amlogic: Add core clock for T7
Date: Thu, 24 Sep 2026 15:25:13 +0000	[thread overview]
Message-ID: <20260924152514.679651F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20260924-add-t7-sys-pwm-clk-v1-1-05b91e87f0a9@aliel.fr>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] dt-bindings: pwm: amlogic: ABI break for amlogic,t7-pwm
--

commit ea055f0ab3ecf76a41b2a2cf99ee615eac00cdc9
Author: Ronald Claveau <linux-kernel-dev@aliel.fr>

dt-bindings: pwm: amlogic: Add core clock for T7

This commit adds a third core clock for the amlogic,t7-pwm compatible
binding and requires clock-names for this SoC. Other compatibles are left
unchanged, and an example is added for T7 usage.

> diff --git a/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml b/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml
> index c337d85da40f1..9212a40d9fe48 100644
> --- a/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml
> +++ b/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml

[ ... ]

> @@ -135,17 +135,38 @@ allOf:
>        properties:
>          compatible:
>            contains:
> -            enum:
> -              - amlogic,meson-s4-pwm
> +            const: amlogic,t7-pwm
>      then:
>        properties:
>          clocks:
>            items:
>              - description: input clock of PWM channel A
>              - description: input clock of PWM channel B
> -        clock-names: false
> +            - description: gate clock for the PWM controller
> +        clock-names:
> +          items:
> +            - const: clk_a
> +            - const: clk_b
> +            - const: core
>        required:
>          - clocks
> +        - clock-names

[Severity: Medium]
Does this introduce a schema validation regression for older device trees?

By defining exactly three items in the clocks list and strictly requiring
the clock-names property, older device trees that only provide two clocks
and omit clock-names will fail validation. Device tree schemas typically
must maintain backward compatibility with older or out-of-tree DTBs.

Should the schema specify a minimum item count of 2 for clocks and only
conditionally require clock-names based on the number of clocks provided
to avoid an ABI break?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260924-add-t7-sys-pwm-clk-v1-0-05b91e87f0a9@aliel.fr?part=1

_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic

  reply	other threads:[~2026-09-24 15:25 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-24 15:14 [PATCH 0/3] Add T7 PWM core clock support Ronald Claveau via B4 Relay
2026-09-24 15:14 ` [PATCH 1/3] dt-bindings: pwm: amlogic: Add core clock for T7 Ronald Claveau via B4 Relay
2026-09-24 15:25   ` sashiko-bot [this message]
2026-09-24 16:35   ` Conor Dooley
2026-09-24 15:14 ` [PATCH 2/3] pwm: meson: Add optional core clock for S4 PWM Ronald Claveau via B4 Relay
2026-09-24 15:14 ` [PATCH 3/3] arm64: dts: amlogic: t7: Add core clock to PWM controller nodes Ronald Claveau via B4 Relay

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