From: Carlo Caione <ccaione@baylibre.com>
To: Neil Armstrong <neil.armstrong@linaro.org>,
Jerome Brunet <jbrunet@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Brian Masney <bmasney+clk@redhat.com>,
Kevin Hilman <khilman@baylibre.com>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Cc: linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
Carlo Caione <ccaione@baylibre.com>
Subject: [PATCH 0/2] Fix rate rounding for Meson read-only dividers
Date: Mon, 26 Oct 2026 14:29:43 +0100 [thread overview]
Message-ID: <20261026-upstream-clk-regmap-ro-divider-v1-0-c8216b0fb93a@baylibre.com> (raw)
Meson read-only dividers can round a requested rate using a divisor they
cannot program. The clock core may then adjust child clocks using the
wrong parent rate.
This series uses the divisor already set in hardware. The first patch
adds a missing /4 entry to the GXL and G12A HDMI divider tables so that
all their register values can be read correctly.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
---
Carlo Caione (2):
clk: meson: add the missing HDMI divider /4 alias
clk: meson: regmap: use the current divisor for read-only clocks
drivers/clk/meson/clk-regmap.c | 34 +++++++++++++++++++++-------------
drivers/clk/meson/g12a.c | 3 ++-
drivers/clk/meson/gxbb.c | 3 ++-
3 files changed, 25 insertions(+), 15 deletions(-)
---
base-commit: 363f97a1ce635b86be7fd263d56a040fbd87bdbb
change-id: 20261026-upstream-clk-regmap-ro-divider-f9ee3532fbe1
Best regards,
--
Carlo Caione <ccaione@baylibre.com>
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next reply other threads:[~2026-10-26 13:30 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-26 13:29 Carlo Caione [this message]
2026-10-26 13:29 ` [PATCH 1/2] clk: meson: add the missing HDMI divider /4 alias Carlo Caione
2026-10-29 11:07 ` Jerome Brunet
2026-10-26 13:29 ` [PATCH 2/2] clk: meson: regmap: use the current divisor for read-only clocks Carlo Caione
2026-10-29 11:07 ` Jerome Brunet
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