* [PATCH] media: rc: meson-ir: support MMIO regmaps to access registers
@ 2023-05-11 3:43 zelong dong
2023-05-11 8:31 ` Neil Armstrong
2023-05-12 13:08 ` Dan Carpenter
0 siblings, 2 replies; 7+ messages in thread
From: zelong dong @ 2023-05-11 3:43 UTC (permalink / raw)
To: Neil Armstrong, Sean Young, Mauro Carvalho Chehab, Rob Herring,
Jerome Brunet, Kevin Hilman, Martin Blumenstingl
Cc: linux-media, linux-amlogic, Qianggui.Song, Yonghui.Yu,
kelvin.zhang, Zelong Dong
From: Zelong Dong <zelong.dong@amlogic.com>
Supports MMIO regmaps to access controller registers in Meson IR driver.
And rename register macro for identify more clearly.
Signed-off-by: Zelong Dong <zelong.dong@amlogic.com>
---
drivers/media/rc/meson-ir.c | 128 ++++++++++++++++++++----------------
1 file changed, 70 insertions(+), 58 deletions(-)
diff --git a/drivers/media/rc/meson-ir.c b/drivers/media/rc/meson-ir.c
index 4b769111f78e..045d78f0862c 100644
--- a/drivers/media/rc/meson-ir.c
+++ b/drivers/media/rc/meson-ir.c
@@ -14,6 +14,7 @@
#include <linux/platform_device.h>
#include <linux/spinlock.h>
#include <linux/bitfield.h>
+#include <linux/regmap.h>
#include <media/rc-core.h>
@@ -24,57 +25,50 @@
#define IR_DEC_LDR_IDLE 0x04
#define IR_DEC_LDR_REPEAT 0x08
#define IR_DEC_BIT_0 0x0c
+
#define IR_DEC_REG0 0x10
-#define IR_DEC_FRAME 0x14
-#define IR_DEC_STATUS 0x18
-#define IR_DEC_REG1 0x1c
-/* only available on Meson 8b and newer */
-#define IR_DEC_REG2 0x20
+#define IR_DEC_REG0_BASE_TIME GENMASK(11, 0)
-#define REG0_RATE_MASK GENMASK(11, 0)
+#define IR_DEC_FRAME 0x14
-#define DECODE_MODE_NEC 0x0
-#define DECODE_MODE_RAW 0x2
+#define IR_DEC_STATUS 0x18
+#define IR_DEC_STATUS_PULSE BIT(8)
+#define IR_DEC_REG1 0x1c
+#define IR_DEC_REG1_TIME_IV GENMASK(28, 16)
+#define IR_DEC_REG1_ENABLE BIT(15)
/* Meson 6b uses REG1 to configure the mode */
-#define REG1_MODE_MASK GENMASK(8, 7)
-#define REG1_MODE_SHIFT 7
+#define IR_DEC_REG1_MODE GENMASK(8, 7)
+#define IR_DEC_REG1_IRQSEL GENMASK(3, 2)
+#define IR_DEC_REG1_RESET BIT(0)
+/* only available on Meson 8b and newer */
+#define IR_DEC_REG2 0x20
/* Meson 8b / GXBB use REG2 to configure the mode */
-#define REG2_MODE_MASK GENMASK(3, 0)
-#define REG2_MODE_SHIFT 0
-
-#define REG1_TIME_IV_MASK GENMASK(28, 16)
-
-#define REG1_IRQSEL_MASK GENMASK(3, 2)
-#define REG1_IRQSEL_NEC_MODE 0
-#define REG1_IRQSEL_RISE_FALL 1
-#define REG1_IRQSEL_FALL 2
-#define REG1_IRQSEL_RISE 3
+#define IR_DEC_REG2_MODE GENMASK(3, 0)
-#define REG1_RESET BIT(0)
-#define REG1_ENABLE BIT(15)
+#define DEC_MODE_NEC 0x0
+#define DEC_MODE_RAW 0x2
-#define STATUS_IR_DEC_IN BIT(8)
+#define IRQSEL_NEC_MODE 0
+#define IRQSEL_RISE_FALL 1
+#define IRQSEL_FALL 2
+#define IRQSEL_RISE 3
-#define MESON_TRATE 10 /* us */
+#define MESON_RAW_TRATE 10 /* us */
+#define MESON_HW_TRATE 20 /* us */
struct meson_ir {
- void __iomem *reg;
+ struct regmap *reg;
struct rc_dev *rc;
spinlock_t lock;
};
-static void meson_ir_set_mask(struct meson_ir *ir, unsigned int reg,
- u32 mask, u32 value)
-{
- u32 data;
-
- data = readl(ir->reg + reg);
- data &= ~mask;
- data |= (value & mask);
- writel(data, ir->reg + reg);
-}
+static struct regmap_config meson_ir_regmap_config = {
+ .reg_bits = 32,
+ .val_bits = 32,
+ .reg_stride = 4,
+};
static irqreturn_t meson_ir_irq(int irqno, void *dev_id)
{
@@ -84,12 +78,12 @@ static irqreturn_t meson_ir_irq(int irqno, void *dev_id)
spin_lock(&ir->lock);
- duration = readl_relaxed(ir->reg + IR_DEC_REG1);
- duration = FIELD_GET(REG1_TIME_IV_MASK, duration);
- rawir.duration = duration * MESON_TRATE;
+ regmap_read(ir->reg, IR_DEC_REG1, &duration);
+ duration = FIELD_GET(IR_DEC_REG1_TIME_IV, duration);
+ rawir.duration = duration * MESON_RAW_TRATE;
- status = readl_relaxed(ir->reg + IR_DEC_STATUS);
- rawir.pulse = !!(status & STATUS_IR_DEC_IN);
+ regmap_read(ir->reg, IR_DEC_STATUS, &status);
+ rawir.pulse = !!(status & IR_DEC_STATUS_PULSE);
ir_raw_event_store_with_timeout(ir->rc, &rawir);
@@ -102,6 +96,8 @@ static int meson_ir_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct device_node *node = dev->of_node;
+ struct resource *res;
+ void __iomem *res_start;
const char *map_name;
struct meson_ir *ir;
int irq, ret;
@@ -110,7 +106,17 @@ static int meson_ir_probe(struct platform_device *pdev)
if (!ir)
return -ENOMEM;
- ir->reg = devm_platform_ioremap_resource(pdev, 0);
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (IS_ERR_OR_NULL(res)) {
+ dev_err(&pdev->dev, "get mem resource error, %ld\n",
+ PTR_ERR(res));
+ return PTR_ERR(res);
+ }
+
+ res_start = devm_ioremap_resource(&pdev->dev, res);
+ meson_ir_regmap_config.max_register = resource_size(res) - 4;
+ ir->reg = devm_regmap_init_mmio(&pdev->dev, res_start,
+ &meson_ir_regmap_config);
if (IS_ERR(ir->reg))
return PTR_ERR(ir->reg);
@@ -131,7 +137,7 @@ static int meson_ir_probe(struct platform_device *pdev)
map_name = of_get_property(node, "linux,rc-map-name", NULL);
ir->rc->map_name = map_name ? map_name : RC_MAP_EMPTY;
ir->rc->allowed_protocols = RC_PROTO_BIT_ALL_IR_DECODER;
- ir->rc->rx_resolution = MESON_TRATE;
+ ir->rc->rx_resolution = MESON_RAW_TRATE;
ir->rc->min_timeout = 1;
ir->rc->timeout = IR_DEFAULT_TIMEOUT;
ir->rc->max_timeout = 10 * IR_DEFAULT_TIMEOUT;
@@ -153,24 +159,28 @@ static int meson_ir_probe(struct platform_device *pdev)
}
/* Reset the decoder */
- meson_ir_set_mask(ir, IR_DEC_REG1, REG1_RESET, REG1_RESET);
- meson_ir_set_mask(ir, IR_DEC_REG1, REG1_RESET, 0);
+ regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_RESET,
+ IR_DEC_REG1_RESET);
+ regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_RESET, 0);
/* Set general operation mode (= raw/software decoding) */
if (of_device_is_compatible(node, "amlogic,meson6-ir"))
- meson_ir_set_mask(ir, IR_DEC_REG1, REG1_MODE_MASK,
- FIELD_PREP(REG1_MODE_MASK, DECODE_MODE_RAW));
+ regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_MODE,
+ FIELD_PREP(IR_DEC_REG1_MODE, DEC_MODE_RAW));
else
- meson_ir_set_mask(ir, IR_DEC_REG2, REG2_MODE_MASK,
- FIELD_PREP(REG2_MODE_MASK, DECODE_MODE_RAW));
+ regmap_update_bits(ir->reg, IR_DEC_REG2, IR_DEC_REG2_MODE,
+ FIELD_PREP(IR_DEC_REG2_MODE, DEC_MODE_RAW));
/* Set rate */
- meson_ir_set_mask(ir, IR_DEC_REG0, REG0_RATE_MASK, MESON_TRATE - 1);
+ regmap_update_bits(ir->reg, IR_DEC_REG0, IR_DEC_REG0_BASE_TIME,
+ FIELD_PREP(IR_DEC_REG0_BASE_TIME,
+ MESON_RAW_TRATE - 1));
/* IRQ on rising and falling edges */
- meson_ir_set_mask(ir, IR_DEC_REG1, REG1_IRQSEL_MASK,
- FIELD_PREP(REG1_IRQSEL_MASK, REG1_IRQSEL_RISE_FALL));
+ regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_IRQSEL,
+ FIELD_PREP(IR_DEC_REG1_IRQSEL, IRQSEL_RISE_FALL));
/* Enable the decoder */
- meson_ir_set_mask(ir, IR_DEC_REG1, REG1_ENABLE, REG1_ENABLE);
+ regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_ENABLE,
+ IR_DEC_REG1_ENABLE);
dev_info(dev, "receiver initialized\n");
@@ -184,7 +194,7 @@ static int meson_ir_remove(struct platform_device *pdev)
/* Disable the decoder */
spin_lock_irqsave(&ir->lock, flags);
- meson_ir_set_mask(ir, IR_DEC_REG1, REG1_ENABLE, 0);
+ regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_ENABLE, 0);
spin_unlock_irqrestore(&ir->lock, flags);
return 0;
@@ -204,14 +214,16 @@ static void meson_ir_shutdown(struct platform_device *pdev)
* bootloader a chance to power the system back on
*/
if (of_device_is_compatible(node, "amlogic,meson6-ir"))
- meson_ir_set_mask(ir, IR_DEC_REG1, REG1_MODE_MASK,
- DECODE_MODE_NEC << REG1_MODE_SHIFT);
+ regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_MODE,
+ FIELD_PREP(IR_DEC_REG1_MODE, DEC_MODE_NEC));
else
- meson_ir_set_mask(ir, IR_DEC_REG2, REG2_MODE_MASK,
- DECODE_MODE_NEC << REG2_MODE_SHIFT);
+ regmap_update_bits(ir->reg, IR_DEC_REG2, IR_DEC_REG2_MODE,
+ FIELD_PREP(IR_DEC_REG2_MODE, DEC_MODE_NEC));
/* Set rate to default value */
- meson_ir_set_mask(ir, IR_DEC_REG0, REG0_RATE_MASK, 0x13);
+ regmap_update_bits(ir->reg, IR_DEC_REG0, IR_DEC_REG0_BASE_TIME,
+ FIELD_PREP(IR_DEC_REG0_BASE_TIME,
+ MESON_HW_TRATE - 1));
spin_unlock_irqrestore(&ir->lock, flags);
}
--
2.35.1
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^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] media: rc: meson-ir: support MMIO regmaps to access registers
2023-05-11 3:43 [PATCH] media: rc: meson-ir: support MMIO regmaps to access registers zelong dong
@ 2023-05-11 8:31 ` Neil Armstrong
2023-05-12 12:19 ` Zelong Dong
2023-05-12 13:08 ` Dan Carpenter
1 sibling, 1 reply; 7+ messages in thread
From: Neil Armstrong @ 2023-05-11 8:31 UTC (permalink / raw)
To: zelong dong, Sean Young, Mauro Carvalho Chehab, Rob Herring,
Jerome Brunet, Kevin Hilman, Martin Blumenstingl
Cc: linux-media, linux-amlogic, Qianggui.Song, Yonghui.Yu, kelvin.zhang
Hi,
Thanks for splitting the regmap conversion in a separate change.
On 11/05/2023 05:43, zelong dong wrote:
> From: Zelong Dong <zelong.dong@amlogic.com>
>
> Supports MMIO regmaps to access controller registers in Meson IR driver.
> And rename register macro for identify more clearly. >
> Signed-off-by: Zelong Dong <zelong.dong@amlogic.com>
> ---
> drivers/media/rc/meson-ir.c | 128 ++++++++++++++++++++----------------
> 1 file changed, 70 insertions(+), 58 deletions(-)
>
> diff --git a/drivers/media/rc/meson-ir.c b/drivers/media/rc/meson-ir.c
> index 4b769111f78e..045d78f0862c 100644
> --- a/drivers/media/rc/meson-ir.c
> +++ b/drivers/media/rc/meson-ir.c
> @@ -14,6 +14,7 @@
> #include <linux/platform_device.h>
> #include <linux/spinlock.h>
> #include <linux/bitfield.h>
> +#include <linux/regmap.h>
>
> #include <media/rc-core.h>
>
> @@ -24,57 +25,50 @@
> #define IR_DEC_LDR_IDLE 0x04
> #define IR_DEC_LDR_REPEAT 0x08
> #define IR_DEC_BIT_0 0x0c
> +
Please move the cleanup/renames to a separate patch
> #define IR_DEC_REG0 0x10
> -#define IR_DEC_FRAME 0x14
> -#define IR_DEC_STATUS 0x18
> -#define IR_DEC_REG1 0x1c
> -/* only available on Meson 8b and newer */
> -#define IR_DEC_REG2 0x20
> +#define IR_DEC_REG0_BASE_TIME GENMASK(11, 0)
>
> -#define REG0_RATE_MASK GENMASK(11, 0)
> +#define IR_DEC_FRAME 0x14
>
> -#define DECODE_MODE_NEC 0x0
> -#define DECODE_MODE_RAW 0x2
> +#define IR_DEC_STATUS 0x18
> +#define IR_DEC_STATUS_PULSE BIT(8)
>
> +#define IR_DEC_REG1 0x1c
> +#define IR_DEC_REG1_TIME_IV GENMASK(28, 16)
> +#define IR_DEC_REG1_ENABLE BIT(15)
> /* Meson 6b uses REG1 to configure the mode */
> -#define REG1_MODE_MASK GENMASK(8, 7)
> -#define REG1_MODE_SHIFT 7
> +#define IR_DEC_REG1_MODE GENMASK(8, 7)
> +#define IR_DEC_REG1_IRQSEL GENMASK(3, 2)
> +#define IR_DEC_REG1_RESET BIT(0)
>
> +/* only available on Meson 8b and newer */
Same, please move new comments/cleanup/renames to a separate patch.
> +#define IR_DEC_REG2 0x20
> /* Meson 8b / GXBB use REG2 to configure the mode */
> -#define REG2_MODE_MASK GENMASK(3, 0)
> -#define REG2_MODE_SHIFT 0
> -
> -#define REG1_TIME_IV_MASK GENMASK(28, 16)
> -
> -#define REG1_IRQSEL_MASK GENMASK(3, 2)
> -#define REG1_IRQSEL_NEC_MODE 0
> -#define REG1_IRQSEL_RISE_FALL 1
> -#define REG1_IRQSEL_FALL 2
> -#define REG1_IRQSEL_RISE 3
> +#define IR_DEC_REG2_MODE GENMASK(3, 0)
>
> -#define REG1_RESET BIT(0)
> -#define REG1_ENABLE BIT(15)
> +#define DEC_MODE_NEC 0x0
> +#define DEC_MODE_RAW 0x2
>
> -#define STATUS_IR_DEC_IN BIT(8)
> +#define IRQSEL_NEC_MODE 0
> +#define IRQSEL_RISE_FALL 1
> +#define IRQSEL_FALL 2
> +#define IRQSEL_RISE 3
>
> -#define MESON_TRATE 10 /* us */
> +#define MESON_RAW_TRATE 10 /* us */
> +#define MESON_HW_TRATE 20 /* us */
>
> struct meson_ir {
> - void __iomem *reg;
> + struct regmap *reg;
> struct rc_dev *rc;
> spinlock_t lock;
> };
>
> -static void meson_ir_set_mask(struct meson_ir *ir, unsigned int reg,
> - u32 mask, u32 value)
> -{
> - u32 data;
> -
> - data = readl(ir->reg + reg);
> - data &= ~mask;
> - data |= (value & mask);
> - writel(data, ir->reg + reg);
> -}
> +static struct regmap_config meson_ir_regmap_config = {
> + .reg_bits = 32,
> + .val_bits = 32,
> + .reg_stride = 4,
> +};
>
> static irqreturn_t meson_ir_irq(int irqno, void *dev_id)
> {
> @@ -84,12 +78,12 @@ static irqreturn_t meson_ir_irq(int irqno, void *dev_id)
>
> spin_lock(&ir->lock);
>
> - duration = readl_relaxed(ir->reg + IR_DEC_REG1);
> - duration = FIELD_GET(REG1_TIME_IV_MASK, duration);
> - rawir.duration = duration * MESON_TRATE;
> + regmap_read(ir->reg, IR_DEC_REG1, &duration);
> + duration = FIELD_GET(IR_DEC_REG1_TIME_IV, duration);
> + rawir.duration = duration * MESON_RAW_TRATE;
>
> - status = readl_relaxed(ir->reg + IR_DEC_STATUS);
> - rawir.pulse = !!(status & STATUS_IR_DEC_IN);
> + regmap_read(ir->reg, IR_DEC_STATUS, &status);
> + rawir.pulse = !!(status & IR_DEC_STATUS_PULSE);
>
> ir_raw_event_store_with_timeout(ir->rc, &rawir);
>
> @@ -102,6 +96,8 @@ static int meson_ir_probe(struct platform_device *pdev)
> {
> struct device *dev = &pdev->dev;
> struct device_node *node = dev->of_node;
> + struct resource *res;
> + void __iomem *res_start;
> const char *map_name;
> struct meson_ir *ir;
> int irq, ret;
> @@ -110,7 +106,17 @@ static int meson_ir_probe(struct platform_device *pdev)
> if (!ir)
> return -ENOMEM;
>
> - ir->reg = devm_platform_ioremap_resource(pdev, 0);
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + if (IS_ERR_OR_NULL(res)) {
> + dev_err(&pdev->dev, "get mem resource error, %ld\n",
> + PTR_ERR(res));
> + return PTR_ERR(res);
> + }
> +
> + res_start = devm_ioremap_resource(&pdev->dev, res);
Use devm_platform_ioremap_resource() instead
> + meson_ir_regmap_config.max_register = resource_size(res) - 4;
> + ir->reg = devm_regmap_init_mmio(&pdev->dev, res_start,
> + &meson_ir_regmap_config);
> if (IS_ERR(ir->reg))
> return PTR_ERR(ir->reg);
>
> @@ -131,7 +137,7 @@ static int meson_ir_probe(struct platform_device *pdev)
> map_name = of_get_property(node, "linux,rc-map-name", NULL);
> ir->rc->map_name = map_name ? map_name : RC_MAP_EMPTY;
> ir->rc->allowed_protocols = RC_PROTO_BIT_ALL_IR_DECODER;
> - ir->rc->rx_resolution = MESON_TRATE;
> + ir->rc->rx_resolution = MESON_RAW_TRATE;
This should go in a separate patch with a Fixes tag
> ir->rc->min_timeout = 1;
> ir->rc->timeout = IR_DEFAULT_TIMEOUT;
> ir->rc->max_timeout = 10 * IR_DEFAULT_TIMEOUT;
> @@ -153,24 +159,28 @@ static int meson_ir_probe(struct platform_device *pdev)
> }
>
> /* Reset the decoder */
> - meson_ir_set_mask(ir, IR_DEC_REG1, REG1_RESET, REG1_RESET);
> - meson_ir_set_mask(ir, IR_DEC_REG1, REG1_RESET, 0);
> + regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_RESET,
> + IR_DEC_REG1_RESET);
> + regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_RESET, 0);
>
> /* Set general operation mode (= raw/software decoding) */
> if (of_device_is_compatible(node, "amlogic,meson6-ir"))
> - meson_ir_set_mask(ir, IR_DEC_REG1, REG1_MODE_MASK,
> - FIELD_PREP(REG1_MODE_MASK, DECODE_MODE_RAW));
> + regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_MODE,
> + FIELD_PREP(IR_DEC_REG1_MODE, DEC_MODE_RAW));
> else
> - meson_ir_set_mask(ir, IR_DEC_REG2, REG2_MODE_MASK,
> - FIELD_PREP(REG2_MODE_MASK, DECODE_MODE_RAW));
> + regmap_update_bits(ir->reg, IR_DEC_REG2, IR_DEC_REG2_MODE,
> + FIELD_PREP(IR_DEC_REG2_MODE, DEC_MODE_RAW));
>
> /* Set rate */
> - meson_ir_set_mask(ir, IR_DEC_REG0, REG0_RATE_MASK, MESON_TRATE - 1);
> + regmap_update_bits(ir->reg, IR_DEC_REG0, IR_DEC_REG0_BASE_TIME,
> + FIELD_PREP(IR_DEC_REG0_BASE_TIME,
> + MESON_RAW_TRATE - 1));
> /* IRQ on rising and falling edges */
> - meson_ir_set_mask(ir, IR_DEC_REG1, REG1_IRQSEL_MASK,
> - FIELD_PREP(REG1_IRQSEL_MASK, REG1_IRQSEL_RISE_FALL));
> + regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_IRQSEL,
> + FIELD_PREP(IR_DEC_REG1_IRQSEL, IRQSEL_RISE_FALL));
> /* Enable the decoder */
> - meson_ir_set_mask(ir, IR_DEC_REG1, REG1_ENABLE, REG1_ENABLE);
> + regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_ENABLE,
> + IR_DEC_REG1_ENABLE);
>
> dev_info(dev, "receiver initialized\n");
>
> @@ -184,7 +194,7 @@ static int meson_ir_remove(struct platform_device *pdev)
>
> /* Disable the decoder */
> spin_lock_irqsave(&ir->lock, flags);
> - meson_ir_set_mask(ir, IR_DEC_REG1, REG1_ENABLE, 0);
> + regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_ENABLE, 0);
> spin_unlock_irqrestore(&ir->lock, flags);
>
> return 0;
> @@ -204,14 +214,16 @@ static void meson_ir_shutdown(struct platform_device *pdev)
> * bootloader a chance to power the system back on
> */
> if (of_device_is_compatible(node, "amlogic,meson6-ir"))
> - meson_ir_set_mask(ir, IR_DEC_REG1, REG1_MODE_MASK,
> - DECODE_MODE_NEC << REG1_MODE_SHIFT);
> + regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_MODE,
> + FIELD_PREP(IR_DEC_REG1_MODE, DEC_MODE_NEC));
> else
> - meson_ir_set_mask(ir, IR_DEC_REG2, REG2_MODE_MASK,
> - DECODE_MODE_NEC << REG2_MODE_SHIFT);
> + regmap_update_bits(ir->reg, IR_DEC_REG2, IR_DEC_REG2_MODE,
> + FIELD_PREP(IR_DEC_REG2_MODE, DEC_MODE_NEC));
>
> /* Set rate to default value */
> - meson_ir_set_mask(ir, IR_DEC_REG0, REG0_RATE_MASK, 0x13);
> + regmap_update_bits(ir->reg, IR_DEC_REG0, IR_DEC_REG0_BASE_TIME,
> + FIELD_PREP(IR_DEC_REG0_BASE_TIME,
> + MESON_HW_TRATE - 1));
>
> spin_unlock_irqrestore(&ir->lock, flags);
> }
Thanks,
Neil
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^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] media: rc: meson-ir: support MMIO regmaps to access registers
2023-05-11 8:31 ` Neil Armstrong
@ 2023-05-12 12:19 ` Zelong Dong
2023-05-12 13:24 ` neil.armstrong
0 siblings, 1 reply; 7+ messages in thread
From: Zelong Dong @ 2023-05-12 12:19 UTC (permalink / raw)
To: neil.armstrong, Sean Young, Mauro Carvalho Chehab, Rob Herring,
Jerome Brunet, Kevin Hilman, Martin Blumenstingl
Cc: linux-media, linux-amlogic, Qianggui.Song, Yonghui.Yu, kelvin.zhang
Thanks for your review.
在 2023/5/11 16:31, Neil Armstrong 写道:
> [你通常不会收到来自 neil.armstrong@linaro.org 的电子邮件。请访问
> https://aka.ms/LearnAboutSenderIdentification，以了解这一点为什么很重要]
>
> [ EXTERNAL EMAIL ]
>
> Hi,
>
> Thanks for splitting the regmap conversion in a separate change.
>
> On 11/05/2023 05:43, zelong dong wrote:
>> From: Zelong Dong <zelong.dong@amlogic.com>
>>
>> Supports MMIO regmaps to access controller registers in Meson IR driver.
>> And rename register macro for identify more clearly. >
>> Signed-off-by: Zelong Dong <zelong.dong@amlogic.com>
>> ---
>> drivers/media/rc/meson-ir.c | 128 ++++++++++++++++++++----------------
>> 1 file changed, 70 insertions(+), 58 deletions(-)
>>
>> diff --git a/drivers/media/rc/meson-ir.c b/drivers/media/rc/meson-ir.c
>> index 4b769111f78e..045d78f0862c 100644
>> --- a/drivers/media/rc/meson-ir.c
>> +++ b/drivers/media/rc/meson-ir.c
>> @@ -14,6 +14,7 @@
>> #include <linux/platform_device.h>
>> #include <linux/spinlock.h>
>> #include <linux/bitfield.h>
>> +#include <linux/regmap.h>
>>
>> #include <media/rc-core.h>
>>
>> @@ -24,57 +25,50 @@
>> #define IR_DEC_LDR_IDLE 0x04
>> #define IR_DEC_LDR_REPEAT 0x08
>> #define IR_DEC_BIT_0 0x0c
>> +
>
> Please move the cleanup/renames to a separate patch
>
>> #define IR_DEC_REG0 0x10
>> -#define IR_DEC_FRAME 0x14
>> -#define IR_DEC_STATUS 0x18
>> -#define IR_DEC_REG1 0x1c
>> -/* only available on Meson 8b and newer */
>> -#define IR_DEC_REG2 0x20
>> +#define IR_DEC_REG0_BASE_TIME GENMASK(11, 0)
>>
>> -#define REG0_RATE_MASK GENMASK(11, 0)
>> +#define IR_DEC_FRAME 0x14
>>
>> -#define DECODE_MODE_NEC 0x0
>> -#define DECODE_MODE_RAW 0x2
>> +#define IR_DEC_STATUS 0x18
>> +#define IR_DEC_STATUS_PULSE BIT(8)
>>
>> +#define IR_DEC_REG1 0x1c
>> +#define IR_DEC_REG1_TIME_IV GENMASK(28, 16)
>> +#define IR_DEC_REG1_ENABLE BIT(15)
>> /* Meson 6b uses REG1 to configure the mode */
>> -#define REG1_MODE_MASK GENMASK(8, 7)
>> -#define REG1_MODE_SHIFT 7
>> +#define IR_DEC_REG1_MODE GENMASK(8, 7)
>> +#define IR_DEC_REG1_IRQSEL GENMASK(3, 2)
>> +#define IR_DEC_REG1_RESET BIT(0)
>>
>> +/* only available on Meson 8b and newer */
>
> Same, please move new comments/cleanup/renames to a separate patch.
OK, and can I append more register macros?
These macros are unused in this patchset, but they should be used in
next patchset about HW IR decoder.
>
>> +#define IR_DEC_REG2 0x20
>> /* Meson 8b / GXBB use REG2 to configure the mode */
>> -#define REG2_MODE_MASK GENMASK(3, 0)
>> -#define REG2_MODE_SHIFT 0
>> -
>> -#define REG1_TIME_IV_MASK GENMASK(28, 16)
>> -
>> -#define REG1_IRQSEL_MASK GENMASK(3, 2)
>> -#define REG1_IRQSEL_NEC_MODE 0
>> -#define REG1_IRQSEL_RISE_FALL 1
>> -#define REG1_IRQSEL_FALL 2
>> -#define REG1_IRQSEL_RISE 3
>> +#define IR_DEC_REG2_MODE GENMASK(3, 0)
>>
>> -#define REG1_RESET BIT(0)
>> -#define REG1_ENABLE BIT(15)
>> +#define DEC_MODE_NEC 0x0
>> +#define DEC_MODE_RAW 0x2
>>
>> -#define STATUS_IR_DEC_IN BIT(8)
>> +#define IRQSEL_NEC_MODE 0
>> +#define IRQSEL_RISE_FALL 1
>> +#define IRQSEL_FALL 2
>> +#define IRQSEL_RISE 3
>>
>> -#define MESON_TRATE 10 /* us */
>> +#define MESON_RAW_TRATE 10 /* us */
>> +#define MESON_HW_TRATE 20 /* us */
>>
>> struct meson_ir {
>> - void __iomem *reg;
>> + struct regmap *reg;
>> struct rc_dev *rc;
>> spinlock_t lock;
>> };
>>
>> -static void meson_ir_set_mask(struct meson_ir *ir, unsigned int reg,
>> - u32 mask, u32 value)
>> -{
>> - u32 data;
>> -
>> - data = readl(ir->reg + reg);
>> - data &= ~mask;
>> - data |= (value & mask);
>> - writel(data, ir->reg + reg);
>> -}
>> +static struct regmap_config meson_ir_regmap_config = {
>> + .reg_bits = 32,
>> + .val_bits = 32,
>> + .reg_stride = 4,
>> +};
>>
>> static irqreturn_t meson_ir_irq(int irqno, void *dev_id)
>> {
>> @@ -84,12 +78,12 @@ static irqreturn_t meson_ir_irq(int irqno, void
>> *dev_id)
>>
>> spin_lock(&ir->lock);
>>
>> - duration = readl_relaxed(ir->reg + IR_DEC_REG1);
>> - duration = FIELD_GET(REG1_TIME_IV_MASK, duration);
>> - rawir.duration = duration * MESON_TRATE;
>> + regmap_read(ir->reg, IR_DEC_REG1, &duration);
>> + duration = FIELD_GET(IR_DEC_REG1_TIME_IV, duration);
>> + rawir.duration = duration * MESON_RAW_TRATE;
>>
>> - status = readl_relaxed(ir->reg + IR_DEC_STATUS);
>> - rawir.pulse = !!(status & STATUS_IR_DEC_IN);
>> + regmap_read(ir->reg, IR_DEC_STATUS, &status);
>> + rawir.pulse = !!(status & IR_DEC_STATUS_PULSE);
>>
>> ir_raw_event_store_with_timeout(ir->rc, &rawir);
>>
>> @@ -102,6 +96,8 @@ static int meson_ir_probe(struct platform_device
>> *pdev)
>> {
>> struct device *dev = &pdev->dev;
>> struct device_node *node = dev->of_node;
>> + struct resource *res;
>> + void __iomem *res_start;
>> const char *map_name;
>> struct meson_ir *ir;
>> int irq, ret;
>> @@ -110,7 +106,17 @@ static int meson_ir_probe(struct platform_device
>> *pdev)
>> if (!ir)
>> return -ENOMEM;
>>
>> - ir->reg = devm_platform_ioremap_resource(pdev, 0);
>> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> + if (IS_ERR_OR_NULL(res)) {
>> + dev_err(&pdev->dev, "get mem resource error, %ld\n",
>> + PTR_ERR(res));
>> + return PTR_ERR(res);
>> + }
>> +
>> + res_start = devm_ioremap_resource(&pdev->dev, res);
>
> Use devm_platform_ioremap_resource() instead
OK.
>
>> + meson_ir_regmap_config.max_register = resource_size(res) - 4;
>> + ir->reg = devm_regmap_init_mmio(&pdev->dev, res_start,
>> + &meson_ir_regmap_config);
>> if (IS_ERR(ir->reg))
>> return PTR_ERR(ir->reg);
>>
>> @@ -131,7 +137,7 @@ static int meson_ir_probe(struct platform_device
>> *pdev)
>> map_name = of_get_property(node, "linux,rc-map-name", NULL);
>> ir->rc->map_name = map_name ? map_name : RC_MAP_EMPTY;
>> ir->rc->allowed_protocols = RC_PROTO_BIT_ALL_IR_DECODER;
>> - ir->rc->rx_resolution = MESON_TRATE;
>> + ir->rc->rx_resolution = MESON_RAW_TRATE;
>
> This should go in a separate patch with a Fixes tag
Why it need to be with a Fixes tag?
MESON_RAW_TRATE is same as MESON_TRATE, I rename it for distinguish HW
and SW decoder timing resolution.
MESON_HW_TRATE is 0x13, which was used in the nether modification.
>
>> ir->rc->min_timeout = 1;
>> ir->rc->timeout = IR_DEFAULT_TIMEOUT;
>> ir->rc->max_timeout = 10 * IR_DEFAULT_TIMEOUT;
>> @@ -153,24 +159,28 @@ static int meson_ir_probe(struct platform_device
>> *pdev)
>> }
>>
>> /* Reset the decoder */
>> - meson_ir_set_mask(ir, IR_DEC_REG1, REG1_RESET, REG1_RESET);
>> - meson_ir_set_mask(ir, IR_DEC_REG1, REG1_RESET, 0);
>> + regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_RESET,
>> + IR_DEC_REG1_RESET);
>> + regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_RESET, 0);
>>
>> /* Set general operation mode (= raw/software decoding) */
>> if (of_device_is_compatible(node, "amlogic,meson6-ir"))
>> - meson_ir_set_mask(ir, IR_DEC_REG1, REG1_MODE_MASK,
>> - FIELD_PREP(REG1_MODE_MASK,
>> DECODE_MODE_RAW));
>> + regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_MODE,
>> + FIELD_PREP(IR_DEC_REG1_MODE,
>> DEC_MODE_RAW));
>> else
>> - meson_ir_set_mask(ir, IR_DEC_REG2, REG2_MODE_MASK,
>> - FIELD_PREP(REG2_MODE_MASK,
>> DECODE_MODE_RAW));
>> + regmap_update_bits(ir->reg, IR_DEC_REG2, IR_DEC_REG2_MODE,
>> + FIELD_PREP(IR_DEC_REG2_MODE,
>> DEC_MODE_RAW));
>>
>> /* Set rate */
>> - meson_ir_set_mask(ir, IR_DEC_REG0, REG0_RATE_MASK, MESON_TRATE -
>> 1);
>> + regmap_update_bits(ir->reg, IR_DEC_REG0, IR_DEC_REG0_BASE_TIME,
>> + FIELD_PREP(IR_DEC_REG0_BASE_TIME,
>> + MESON_RAW_TRATE - 1));
>> /* IRQ on rising and falling edges */
>> - meson_ir_set_mask(ir, IR_DEC_REG1, REG1_IRQSEL_MASK,
>> - FIELD_PREP(REG1_IRQSEL_MASK,
>> REG1_IRQSEL_RISE_FALL));
>> + regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_IRQSEL,
>> + FIELD_PREP(IR_DEC_REG1_IRQSEL,
>> IRQSEL_RISE_FALL));
>> /* Enable the decoder */
>> - meson_ir_set_mask(ir, IR_DEC_REG1, REG1_ENABLE, REG1_ENABLE);
>> + regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_ENABLE,
>> + IR_DEC_REG1_ENABLE);
>>
>> dev_info(dev, "receiver initialized\n");
>>
>> @@ -184,7 +194,7 @@ static int meson_ir_remove(struct platform_device
>> *pdev)
>>
>> /* Disable the decoder */
>> spin_lock_irqsave(&ir->lock, flags);
>> - meson_ir_set_mask(ir, IR_DEC_REG1, REG1_ENABLE, 0);
>> + regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_ENABLE, 0);
>> spin_unlock_irqrestore(&ir->lock, flags);
>>
>> return 0;
>> @@ -204,14 +214,16 @@ static void meson_ir_shutdown(struct
>> platform_device *pdev)
>> * bootloader a chance to power the system back on
>> */
>> if (of_device_is_compatible(node, "amlogic,meson6-ir"))
>> - meson_ir_set_mask(ir, IR_DEC_REG1, REG1_MODE_MASK,
>> - DECODE_MODE_NEC << REG1_MODE_SHIFT);
>> + regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_MODE,
>> + FIELD_PREP(IR_DEC_REG1_MODE,
>> DEC_MODE_NEC));
>> else
>> - meson_ir_set_mask(ir, IR_DEC_REG2, REG2_MODE_MASK,
>> - DECODE_MODE_NEC << REG2_MODE_SHIFT);
>> + regmap_update_bits(ir->reg, IR_DEC_REG2, IR_DEC_REG2_MODE,
>> + FIELD_PREP(IR_DEC_REG2_MODE,
>> DEC_MODE_NEC));
>>
>> /* Set rate to default value */
>> - meson_ir_set_mask(ir, IR_DEC_REG0, REG0_RATE_MASK, 0x13);
>> + regmap_update_bits(ir->reg, IR_DEC_REG0, IR_DEC_REG0_BASE_TIME,
>> + FIELD_PREP(IR_DEC_REG0_BASE_TIME,
>> + MESON_HW_TRATE - 1));
>>
>> spin_unlock_irqrestore(&ir->lock, flags);
>> }
>
> Thanks,
> Neil
_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] media: rc: meson-ir: support MMIO regmaps to access registers
2023-05-11 3:43 [PATCH] media: rc: meson-ir: support MMIO regmaps to access registers zelong dong
2023-05-11 8:31 ` Neil Armstrong
@ 2023-05-12 13:08 ` Dan Carpenter
2023-05-16 11:47 ` Zelong Dong
1 sibling, 1 reply; 7+ messages in thread
From: Dan Carpenter @ 2023-05-12 13:08 UTC (permalink / raw)
To: oe-kbuild, zelong dong, Neil Armstrong, Sean Young,
Mauro Carvalho Chehab, Rob Herring, Jerome Brunet, Kevin Hilman,
Martin Blumenstingl
Cc: lkp, oe-kbuild-all, linux-media, linux-amlogic, Qianggui.Song,
Yonghui.Yu, kelvin.zhang, Zelong Dong
Hi zelong,
kernel test robot noticed the following build warnings:
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/zelong-dong/media-rc-meson-ir-support-MMIO-regmaps-to-access-registers/20230511-114604
base: 457391b0380335d5e9a5babdec90ac53928b23b4
patch link: https://lore.kernel.org/r/20230511034333.26800-1-zelong.dong%40amlogic.com
patch subject: [PATCH] media: rc: meson-ir: support MMIO regmaps to access registers
config: parisc-randconfig-m041-20230509 (https://download.01.org/0day-ci/archive/20230512/202305122010.lGsFA089-lkp@intel.com/config)
compiler: hppa-linux-gcc (GCC) 12.1.0
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
| Reported-by: Dan Carpenter <error27@gmail.com>
| Link: https://lore.kernel.org/r/202305122010.lGsFA089-lkp@intel.com/
New smatch warnings:
drivers/media/rc/meson-ir.c:111 meson_ir_probe() warn: passing zero to 'PTR_ERR'
Old smatch warnings:
drivers/media/rc/meson-ir.c:113 meson_ir_probe() warn: passing zero to 'PTR_ERR'
vim +/PTR_ERR +111 drivers/media/rc/meson-ir.c
12ddbadf383d55 Beniamino Galvani 2014-11-18 95 static int meson_ir_probe(struct platform_device *pdev)
12ddbadf383d55 Beniamino Galvani 2014-11-18 96 {
12ddbadf383d55 Beniamino Galvani 2014-11-18 97 struct device *dev = &pdev->dev;
12ddbadf383d55 Beniamino Galvani 2014-11-18 98 struct device_node *node = dev->of_node;
5a048b4c2c04b7 Zelong Dong 2023-05-11 99 struct resource *res;
5a048b4c2c04b7 Zelong Dong 2023-05-11 100 void __iomem *res_start;
12ddbadf383d55 Beniamino Galvani 2014-11-18 101 const char *map_name;
12ddbadf383d55 Beniamino Galvani 2014-11-18 102 struct meson_ir *ir;
1ffc931c320a8a Heiner Kallweit 2017-04-12 103 int irq, ret;
12ddbadf383d55 Beniamino Galvani 2014-11-18 104
12ddbadf383d55 Beniamino Galvani 2014-11-18 105 ir = devm_kzalloc(dev, sizeof(struct meson_ir), GFP_KERNEL);
12ddbadf383d55 Beniamino Galvani 2014-11-18 106 if (!ir)
12ddbadf383d55 Beniamino Galvani 2014-11-18 107 return -ENOMEM;
12ddbadf383d55 Beniamino Galvani 2014-11-18 108
5a048b4c2c04b7 Zelong Dong 2023-05-11 109 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
5a048b4c2c04b7 Zelong Dong 2023-05-11 110 if (IS_ERR_OR_NULL(res)) {
5a048b4c2c04b7 Zelong Dong 2023-05-11 @111 dev_err(&pdev->dev, "get mem resource error, %ld\n",
5a048b4c2c04b7 Zelong Dong 2023-05-11 112 PTR_ERR(res));
5a048b4c2c04b7 Zelong Dong 2023-05-11 113 return PTR_ERR(res);
The platform_get_resource() function returns NULL on failure. It never
returns error pointers. This means that return PTR_ERR(res); returns
0 (which means success). Please read my blog for more information.
https://staticthinking.wordpress.com/2022/08/01/mixing-error-pointers-and-null/
This should be:
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
dev_err(&pdev->dev, "get mem resource error\n");
return -EINVAL;
}
5a048b4c2c04b7 Zelong Dong 2023-05-11 114 }
5a048b4c2c04b7 Zelong Dong 2023-05-11 115
5a048b4c2c04b7 Zelong Dong 2023-05-11 116 res_start = devm_ioremap_resource(&pdev->dev, res);
5a048b4c2c04b7 Zelong Dong 2023-05-11 117 meson_ir_regmap_config.max_register = resource_size(res) - 4;
5a048b4c2c04b7 Zelong Dong 2023-05-11 118 ir->reg = devm_regmap_init_mmio(&pdev->dev, res_start,
5a048b4c2c04b7 Zelong Dong 2023-05-11 119 &meson_ir_regmap_config);
9e2e4382ec72d9 Ding Xiang 2019-06-18 120 if (IS_ERR(ir->reg))
12ddbadf383d55 Beniamino Galvani 2014-11-18 121 return PTR_ERR(ir->reg);
12ddbadf383d55 Beniamino Galvani 2014-11-18 122
1ffc931c320a8a Heiner Kallweit 2017-04-12 123 irq = platform_get_irq(pdev, 0);
97299a3035328d Stephen Boyd 2019-07-30 124 if (irq < 0)
1ffc931c320a8a Heiner Kallweit 2017-04-12 125 return irq;
12ddbadf383d55 Beniamino Galvani 2014-11-18 126
705aa578d408f6 Heiner Kallweit 2017-04-12 127 ir->rc = devm_rc_allocate_device(dev, RC_DRIVER_IR_RAW);
12ddbadf383d55 Beniamino Galvani 2014-11-18 128 if (!ir->rc) {
12ddbadf383d55 Beniamino Galvani 2014-11-18 129 dev_err(dev, "failed to allocate rc device\n");
12ddbadf383d55 Beniamino Galvani 2014-11-18 130 return -ENOMEM;
12ddbadf383d55 Beniamino Galvani 2014-11-18 131 }
12ddbadf383d55 Beniamino Galvani 2014-11-18 132
12ddbadf383d55 Beniamino Galvani 2014-11-18 133 ir->rc->priv = ir;
518f4b26be1ebf Sean Young 2017-07-01 134 ir->rc->device_name = DRIVER_NAME;
12ddbadf383d55 Beniamino Galvani 2014-11-18 135 ir->rc->input_phys = DRIVER_NAME "/input0";
12ddbadf383d55 Beniamino Galvani 2014-11-18 136 ir->rc->input_id.bustype = BUS_HOST;
12ddbadf383d55 Beniamino Galvani 2014-11-18 137 map_name = of_get_property(node, "linux,rc-map-name", NULL);
12ddbadf383d55 Beniamino Galvani 2014-11-18 138 ir->rc->map_name = map_name ? map_name : RC_MAP_EMPTY;
6d741bfed5ed06 Sean Young 2017-08-07 139 ir->rc->allowed_protocols = RC_PROTO_BIT_ALL_IR_DECODER;
5a048b4c2c04b7 Zelong Dong 2023-05-11 140 ir->rc->rx_resolution = MESON_RAW_TRATE;
b358e747aebc4a Sean Young 2018-03-12 141 ir->rc->min_timeout = 1;
b358e747aebc4a Sean Young 2018-03-12 142 ir->rc->timeout = IR_DEFAULT_TIMEOUT;
b358e747aebc4a Sean Young 2018-03-12 143 ir->rc->max_timeout = 10 * IR_DEFAULT_TIMEOUT;
12ddbadf383d55 Beniamino Galvani 2014-11-18 144 ir->rc->driver_name = DRIVER_NAME;
12ddbadf383d55 Beniamino Galvani 2014-11-18 145
12ddbadf383d55 Beniamino Galvani 2014-11-18 146 spin_lock_init(&ir->lock);
12ddbadf383d55 Beniamino Galvani 2014-11-18 147 platform_set_drvdata(pdev, ir);
12ddbadf383d55 Beniamino Galvani 2014-11-18 148
705aa578d408f6 Heiner Kallweit 2017-04-12 149 ret = devm_rc_register_device(dev, ir->rc);
12ddbadf383d55 Beniamino Galvani 2014-11-18 150 if (ret) {
12ddbadf383d55 Beniamino Galvani 2014-11-18 151 dev_err(dev, "failed to register rc device\n");
705aa578d408f6 Heiner Kallweit 2017-04-12 152 return ret;
12ddbadf383d55 Beniamino Galvani 2014-11-18 153 }
12ddbadf383d55 Beniamino Galvani 2014-11-18 154
611ee552a538b0 Heiner Kallweit 2017-04-12 155 ret = devm_request_irq(dev, irq, meson_ir_irq, 0, NULL, ir);
12ddbadf383d55 Beniamino Galvani 2014-11-18 156 if (ret) {
12ddbadf383d55 Beniamino Galvani 2014-11-18 157 dev_err(dev, "failed to request irq\n");
705aa578d408f6 Heiner Kallweit 2017-04-12 158 return ret;
12ddbadf383d55 Beniamino Galvani 2014-11-18 159 }
12ddbadf383d55 Beniamino Galvani 2014-11-18 160
12ddbadf383d55 Beniamino Galvani 2014-11-18 161 /* Reset the decoder */
5a048b4c2c04b7 Zelong Dong 2023-05-11 162 regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_RESET,
5a048b4c2c04b7 Zelong Dong 2023-05-11 163 IR_DEC_REG1_RESET);
5a048b4c2c04b7 Zelong Dong 2023-05-11 164 regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_RESET, 0);
6edf27ee258925 Neil Armstrong 2016-08-20 165
6edf27ee258925 Neil Armstrong 2016-08-20 166 /* Set general operation mode (= raw/software decoding) */
6edf27ee258925 Neil Armstrong 2016-08-20 167 if (of_device_is_compatible(node, "amlogic,meson6-ir"))
5a048b4c2c04b7 Zelong Dong 2023-05-11 168 regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_MODE,
5a048b4c2c04b7 Zelong Dong 2023-05-11 169 FIELD_PREP(IR_DEC_REG1_MODE, DEC_MODE_RAW));
6edf27ee258925 Neil Armstrong 2016-08-20 170 else
5a048b4c2c04b7 Zelong Dong 2023-05-11 171 regmap_update_bits(ir->reg, IR_DEC_REG2, IR_DEC_REG2_MODE,
5a048b4c2c04b7 Zelong Dong 2023-05-11 172 FIELD_PREP(IR_DEC_REG2_MODE, DEC_MODE_RAW));
6edf27ee258925 Neil Armstrong 2016-08-20 173
12ddbadf383d55 Beniamino Galvani 2014-11-18 174 /* Set rate */
5a048b4c2c04b7 Zelong Dong 2023-05-11 175 regmap_update_bits(ir->reg, IR_DEC_REG0, IR_DEC_REG0_BASE_TIME,
5a048b4c2c04b7 Zelong Dong 2023-05-11 176 FIELD_PREP(IR_DEC_REG0_BASE_TIME,
5a048b4c2c04b7 Zelong Dong 2023-05-11 177 MESON_RAW_TRATE - 1));
12ddbadf383d55 Beniamino Galvani 2014-11-18 178 /* IRQ on rising and falling edges */
5a048b4c2c04b7 Zelong Dong 2023-05-11 179 regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_IRQSEL,
5a048b4c2c04b7 Zelong Dong 2023-05-11 180 FIELD_PREP(IR_DEC_REG1_IRQSEL, IRQSEL_RISE_FALL));
12ddbadf383d55 Beniamino Galvani 2014-11-18 181 /* Enable the decoder */
5a048b4c2c04b7 Zelong Dong 2023-05-11 182 regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_ENABLE,
5a048b4c2c04b7 Zelong Dong 2023-05-11 183 IR_DEC_REG1_ENABLE);
12ddbadf383d55 Beniamino Galvani 2014-11-18 184
12ddbadf383d55 Beniamino Galvani 2014-11-18 185 dev_info(dev, "receiver initialized\n");
12ddbadf383d55 Beniamino Galvani 2014-11-18 186
12ddbadf383d55 Beniamino Galvani 2014-11-18 187 return 0;
12ddbadf383d55 Beniamino Galvani 2014-11-18 188 }
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests
_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] media: rc: meson-ir: support MMIO regmaps to access registers
2023-05-12 12:19 ` Zelong Dong
@ 2023-05-12 13:24 ` neil.armstrong
0 siblings, 0 replies; 7+ messages in thread
From: neil.armstrong @ 2023-05-12 13:24 UTC (permalink / raw)
To: Zelong Dong, Sean Young, Mauro Carvalho Chehab, Rob Herring,
Jerome Brunet, Kevin Hilman, Martin Blumenstingl
Cc: linux-media, linux-amlogic, Qianggui.Song, Yonghui.Yu, kelvin.zhang
Hi,
On 12/05/2023 14:19, Zelong Dong wrote:
> Thanks for your review.
>
> 在 2023/5/11 16:31, Neil Armstrong 写道:
>> [你通常不会收到来自 neil.armstrong@linaro.org 的电子邮件。请访问 https://aka.ms/LearnAboutSenderIdentification，以了解这一点为什么很重要]
>>
>> [ EXTERNAL EMAIL ]
>>
>> Hi,
>>
>> Thanks for splitting the regmap conversion in a separate change.
>>
>> On 11/05/2023 05:43, zelong dong wrote:
>>> From: Zelong Dong <zelong.dong@amlogic.com>
>>>
>>> Supports MMIO regmaps to access controller registers in Meson IR driver.
>>> And rename register macro for identify more clearly. >
>>> Signed-off-by: Zelong Dong <zelong.dong@amlogic.com>
>>> ---
>>> drivers/media/rc/meson-ir.c | 128 ++++++++++++++++++++----------------
>>> 1 file changed, 70 insertions(+), 58 deletions(-)
>>>
>>> diff --git a/drivers/media/rc/meson-ir.c b/drivers/media/rc/meson-ir.c
>>> index 4b769111f78e..045d78f0862c 100644
>>> --- a/drivers/media/rc/meson-ir.c
>>> +++ b/drivers/media/rc/meson-ir.c
>>> @@ -14,6 +14,7 @@
>>> #include <linux/platform_device.h>
>>> #include <linux/spinlock.h>
>>> #include <linux/bitfield.h>
>>> +#include <linux/regmap.h>
>>>
>>> #include <media/rc-core.h>
>>>
>>> @@ -24,57 +25,50 @@
>>> #define IR_DEC_LDR_IDLE 0x04
>>> #define IR_DEC_LDR_REPEAT 0x08
>>> #define IR_DEC_BIT_0 0x0c
>>> +
>>
>> Please move the cleanup/renames to a separate patch
>>
>>> #define IR_DEC_REG0 0x10
>>> -#define IR_DEC_FRAME 0x14
>>> -#define IR_DEC_STATUS 0x18
>>> -#define IR_DEC_REG1 0x1c
>>> -/* only available on Meson 8b and newer */
>>> -#define IR_DEC_REG2 0x20
>>> +#define IR_DEC_REG0_BASE_TIME GENMASK(11, 0)
>>>
>>> -#define REG0_RATE_MASK GENMASK(11, 0)
>>> +#define IR_DEC_FRAME 0x14
>>>
>>> -#define DECODE_MODE_NEC 0x0
>>> -#define DECODE_MODE_RAW 0x2
>>> +#define IR_DEC_STATUS 0x18
>>> +#define IR_DEC_STATUS_PULSE BIT(8)
>>>
>>> +#define IR_DEC_REG1 0x1c
>>> +#define IR_DEC_REG1_TIME_IV GENMASK(28, 16)
>>> +#define IR_DEC_REG1_ENABLE BIT(15)
>>> /* Meson 6b uses REG1 to configure the mode */
>>> -#define REG1_MODE_MASK GENMASK(8, 7)
>>> -#define REG1_MODE_SHIFT 7
>>> +#define IR_DEC_REG1_MODE GENMASK(8, 7)
>>> +#define IR_DEC_REG1_IRQSEL GENMASK(3, 2)
>>> +#define IR_DEC_REG1_RESET BIT(0)
>>>
>>> +/* only available on Meson 8b and newer */
>>
>> Same, please move new comments/cleanup/renames to a separate patch.
>
> OK, and can I append more register macros?
> These macros are unused in this patchset, but they should be used in next patchset about HW IR decoder.
OK so add them in a next patchset with the new support added.
Ideally you should send the following patches:
- cleanup
- rename of macros
- switch to regmap
- add new macros for new HW
- add support for new HW
It's ok to send the first 3 now, and the last 2 later on.
>
>>
>>> +#define IR_DEC_REG2 0x20
>>> /* Meson 8b / GXBB use REG2 to configure the mode */
>>> -#define REG2_MODE_MASK GENMASK(3, 0)
>>> -#define REG2_MODE_SHIFT 0
>>> -
>>> -#define REG1_TIME_IV_MASK GENMASK(28, 16)
>>> -
>>> -#define REG1_IRQSEL_MASK GENMASK(3, 2)
>>> -#define REG1_IRQSEL_NEC_MODE 0
>>> -#define REG1_IRQSEL_RISE_FALL 1
>>> -#define REG1_IRQSEL_FALL 2
>>> -#define REG1_IRQSEL_RISE 3
>>> +#define IR_DEC_REG2_MODE GENMASK(3, 0)
>>>
>>> -#define REG1_RESET BIT(0)
>>> -#define REG1_ENABLE BIT(15)
>>> +#define DEC_MODE_NEC 0x0
>>> +#define DEC_MODE_RAW 0x2
>>>
>>> -#define STATUS_IR_DEC_IN BIT(8)
>>> +#define IRQSEL_NEC_MODE 0
>>> +#define IRQSEL_RISE_FALL 1
>>> +#define IRQSEL_FALL 2
>>> +#define IRQSEL_RISE 3
>>>
>>> -#define MESON_TRATE 10 /* us */
>>> +#define MESON_RAW_TRATE 10 /* us */
>>> +#define MESON_HW_TRATE 20 /* us */
>>>
>>> struct meson_ir {
>>> - void __iomem *reg;
>>> + struct regmap *reg;
>>> struct rc_dev *rc;
>>> spinlock_t lock;
>>> };
>>>
>>> -static void meson_ir_set_mask(struct meson_ir *ir, unsigned int reg,
>>> - u32 mask, u32 value)
>>> -{
>>> - u32 data;
>>> -
>>> - data = readl(ir->reg + reg);
>>> - data &= ~mask;
>>> - data |= (value & mask);
>>> - writel(data, ir->reg + reg);
>>> -}
>>> +static struct regmap_config meson_ir_regmap_config = {
>>> + .reg_bits = 32,
>>> + .val_bits = 32,
>>> + .reg_stride = 4,
>>> +};
>>>
>>> static irqreturn_t meson_ir_irq(int irqno, void *dev_id)
>>> {
>>> @@ -84,12 +78,12 @@ static irqreturn_t meson_ir_irq(int irqno, void *dev_id)
>>>
>>> spin_lock(&ir->lock);
>>>
>>> - duration = readl_relaxed(ir->reg + IR_DEC_REG1);
>>> - duration = FIELD_GET(REG1_TIME_IV_MASK, duration);
>>> - rawir.duration = duration * MESON_TRATE;
>>> + regmap_read(ir->reg, IR_DEC_REG1, &duration);
>>> + duration = FIELD_GET(IR_DEC_REG1_TIME_IV, duration);
>>> + rawir.duration = duration * MESON_RAW_TRATE;
>>>
>>> - status = readl_relaxed(ir->reg + IR_DEC_STATUS);
>>> - rawir.pulse = !!(status & STATUS_IR_DEC_IN);
>>> + regmap_read(ir->reg, IR_DEC_STATUS, &status);
>>> + rawir.pulse = !!(status & IR_DEC_STATUS_PULSE);
>>>
>>> ir_raw_event_store_with_timeout(ir->rc, &rawir);
>>>
>>> @@ -102,6 +96,8 @@ static int meson_ir_probe(struct platform_device *pdev)
>>> {
>>> struct device *dev = &pdev->dev;
>>> struct device_node *node = dev->of_node;
>>> + struct resource *res;
>>> + void __iomem *res_start;
>>> const char *map_name;
>>> struct meson_ir *ir;
>>> int irq, ret;
>>> @@ -110,7 +106,17 @@ static int meson_ir_probe(struct platform_device *pdev)
>>> if (!ir)
>>> return -ENOMEM;
>>>
>>> - ir->reg = devm_platform_ioremap_resource(pdev, 0);
>>> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>>> + if (IS_ERR_OR_NULL(res)) {
>>> + dev_err(&pdev->dev, "get mem resource error, %ld\n",
>>> + PTR_ERR(res));
>>> + return PTR_ERR(res);
>>> + }
>>> +
>>> + res_start = devm_ioremap_resource(&pdev->dev, res);
>>
>> Use devm_platform_ioremap_resource() instead
>
> OK.
>
>>
>>> + meson_ir_regmap_config.max_register = resource_size(res) - 4;
>>> + ir->reg = devm_regmap_init_mmio(&pdev->dev, res_start,
>>> + &meson_ir_regmap_config);
>>> if (IS_ERR(ir->reg))
>>> return PTR_ERR(ir->reg);
>>>
>>> @@ -131,7 +137,7 @@ static int meson_ir_probe(struct platform_device *pdev)
>>> map_name = of_get_property(node, "linux,rc-map-name", NULL);
>>> ir->rc->map_name = map_name ? map_name : RC_MAP_EMPTY;
>>> ir->rc->allowed_protocols = RC_PROTO_BIT_ALL_IR_DECODER;
>>> - ir->rc->rx_resolution = MESON_TRATE;
>>> + ir->rc->rx_resolution = MESON_RAW_TRATE;
>>
>> This should go in a separate patch with a Fixes tag
>
> Why it need to be with a Fixes tag?
> MESON_RAW_TRATE is same as MESON_TRATE, I rename it for distinguish HW and SW decoder timing resolution.
> MESON_HW_TRATE is 0x13, which was used in the nether modification.
Ok sorry, i though it was a fix, I was confused with the rename mixed with the
regmap transition.
Neil
>
>>
>>> ir->rc->min_timeout = 1;
>>> ir->rc->timeout = IR_DEFAULT_TIMEOUT;
>>> ir->rc->max_timeout = 10 * IR_DEFAULT_TIMEOUT;
>>> @@ -153,24 +159,28 @@ static int meson_ir_probe(struct platform_device *pdev)
>>> }
>>>
>>> /* Reset the decoder */
>>> - meson_ir_set_mask(ir, IR_DEC_REG1, REG1_RESET, REG1_RESET);
>>> - meson_ir_set_mask(ir, IR_DEC_REG1, REG1_RESET, 0);
>>> + regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_RESET,
>>> + IR_DEC_REG1_RESET);
>>> + regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_RESET, 0);
>>>
>>> /* Set general operation mode (= raw/software decoding) */
>>> if (of_device_is_compatible(node, "amlogic,meson6-ir"))
>>> - meson_ir_set_mask(ir, IR_DEC_REG1, REG1_MODE_MASK,
>>> - FIELD_PREP(REG1_MODE_MASK, DECODE_MODE_RAW));
>>> + regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_MODE,
>>> + FIELD_PREP(IR_DEC_REG1_MODE, DEC_MODE_RAW));
>>> else
>>> - meson_ir_set_mask(ir, IR_DEC_REG2, REG2_MODE_MASK,
>>> - FIELD_PREP(REG2_MODE_MASK, DECODE_MODE_RAW));
>>> + regmap_update_bits(ir->reg, IR_DEC_REG2, IR_DEC_REG2_MODE,
>>> + FIELD_PREP(IR_DEC_REG2_MODE, DEC_MODE_RAW));
>>>
>>> /* Set rate */
>>> - meson_ir_set_mask(ir, IR_DEC_REG0, REG0_RATE_MASK, MESON_TRATE - 1);
>>> + regmap_update_bits(ir->reg, IR_DEC_REG0, IR_DEC_REG0_BASE_TIME,
>>> + FIELD_PREP(IR_DEC_REG0_BASE_TIME,
>>> + MESON_RAW_TRATE - 1));
>>> /* IRQ on rising and falling edges */
>>> - meson_ir_set_mask(ir, IR_DEC_REG1, REG1_IRQSEL_MASK,
>>> - FIELD_PREP(REG1_IRQSEL_MASK, REG1_IRQSEL_RISE_FALL));
>>> + regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_IRQSEL,
>>> + FIELD_PREP(IR_DEC_REG1_IRQSEL, IRQSEL_RISE_FALL));
>>> /* Enable the decoder */
>>> - meson_ir_set_mask(ir, IR_DEC_REG1, REG1_ENABLE, REG1_ENABLE);
>>> + regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_ENABLE,
>>> + IR_DEC_REG1_ENABLE);
>>>
>>> dev_info(dev, "receiver initialized\n");
>>>
>>> @@ -184,7 +194,7 @@ static int meson_ir_remove(struct platform_device *pdev)
>>>
>>> /* Disable the decoder */
>>> spin_lock_irqsave(&ir->lock, flags);
>>> - meson_ir_set_mask(ir, IR_DEC_REG1, REG1_ENABLE, 0);
>>> + regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_ENABLE, 0);
>>> spin_unlock_irqrestore(&ir->lock, flags);
>>>
>>> return 0;
>>> @@ -204,14 +214,16 @@ static void meson_ir_shutdown(struct platform_device *pdev)
>>> * bootloader a chance to power the system back on
>>> */
>>> if (of_device_is_compatible(node, "amlogic,meson6-ir"))
>>> - meson_ir_set_mask(ir, IR_DEC_REG1, REG1_MODE_MASK,
>>> - DECODE_MODE_NEC << REG1_MODE_SHIFT);
>>> + regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_MODE,
>>> + FIELD_PREP(IR_DEC_REG1_MODE, DEC_MODE_NEC));
>>> else
>>> - meson_ir_set_mask(ir, IR_DEC_REG2, REG2_MODE_MASK,
>>> - DECODE_MODE_NEC << REG2_MODE_SHIFT);
>>> + regmap_update_bits(ir->reg, IR_DEC_REG2, IR_DEC_REG2_MODE,
>>> + FIELD_PREP(IR_DEC_REG2_MODE, DEC_MODE_NEC));
>>>
>>> /* Set rate to default value */
>>> - meson_ir_set_mask(ir, IR_DEC_REG0, REG0_RATE_MASK, 0x13);
>>> + regmap_update_bits(ir->reg, IR_DEC_REG0, IR_DEC_REG0_BASE_TIME,
>>> + FIELD_PREP(IR_DEC_REG0_BASE_TIME,
>>> + MESON_HW_TRATE - 1));
>>>
>>> spin_unlock_irqrestore(&ir->lock, flags);
>>> }
>>
>> Thanks,
>> Neil
_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] media: rc: meson-ir: support MMIO regmaps to access registers
2023-05-12 13:08 ` Dan Carpenter
@ 2023-05-16 11:47 ` Zelong Dong
2023-05-16 11:52 ` Dan Carpenter
0 siblings, 1 reply; 7+ messages in thread
From: Zelong Dong @ 2023-05-16 11:47 UTC (permalink / raw)
To: Dan Carpenter, oe-kbuild, Neil Armstrong, Sean Young,
Mauro Carvalho Chehab, Rob Herring, Jerome Brunet, Kevin Hilman,
Martin Blumenstingl
Cc: lkp, oe-kbuild-all, linux-media, linux-amlogic, Qianggui.Song,
Yonghui.Yu, kelvin.zhang
Hi Dan Carpenter,
Thanks for your review.
Neil suggest to use devm_platform_ioremap_resource(), would it be better
like this?
res_start = devm_platform_ioremap_resource(pdev, 0);;
if (IS_ERR(res_start))
return PTR_ERR(res_start);
ir->reg = devm_regmap_init_mmio(&pdev->dev, res_start,
&meson_ir_regmap_config);
if (IS_ERR(ir->reg))
return PTR_ERR(ir->reg);
在 2023/5/12 21:08, Dan Carpenter 写道:
> [????????? dan.carpenter@linaro.org ????????? https://aka.ms/LearnAboutSenderIdentification?????????????]
>
> [ EXTERNAL EMAIL ]
>
> Hi zelong,
>
> kernel test robot noticed the following build warnings:
>
> https://git-scm.com/docs/git-format-patch#_base_tree_information]
>
> url: https://github.com/intel-lab-lkp/linux/commits/zelong-dong/media-rc-meson-ir-support-MMIO-regmaps-to-access-registers/20230511-114604
> base: 457391b0380335d5e9a5babdec90ac53928b23b4
> patch link: https://lore.kernel.org/r/20230511034333.26800-1-zelong.dong%40amlogic.com
> patch subject: [PATCH] media: rc: meson-ir: support MMIO regmaps to access registers
> config: parisc-randconfig-m041-20230509 (https://download.01.org/0day-ci/archive/20230512/202305122010.lGsFA089-lkp@intel.com/config)
> compiler: hppa-linux-gcc (GCC) 12.1.0
>
> If you fix the issue, kindly add following tag where applicable
> | Reported-by: kernel test robot <lkp@intel.com>
> | Reported-by: Dan Carpenter <error27@gmail.com>
> | Link: https://lore.kernel.org/r/202305122010.lGsFA089-lkp@intel.com/
>
> New smatch warnings:
> drivers/media/rc/meson-ir.c:111 meson_ir_probe() warn: passing zero to 'PTR_ERR'
>
> Old smatch warnings:
> drivers/media/rc/meson-ir.c:113 meson_ir_probe() warn: passing zero to 'PTR_ERR'
>
> vim +/PTR_ERR +111 drivers/media/rc/meson-ir.c
>
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 95 static int meson_ir_probe(struct platform_device *pdev)
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 96 {
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 97 struct device *dev = &pdev->dev;
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 98 struct device_node *node = dev->of_node;
> 5a048b4c2c04b7 Zelong Dong 2023-05-11 99 struct resource *res;
> 5a048b4c2c04b7 Zelong Dong 2023-05-11 100 void __iomem *res_start;
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 101 const char *map_name;
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 102 struct meson_ir *ir;
> 1ffc931c320a8a Heiner Kallweit 2017-04-12 103 int irq, ret;
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 104
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 105 ir = devm_kzalloc(dev, sizeof(struct meson_ir), GFP_KERNEL);
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 106 if (!ir)
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 107 return -ENOMEM;
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 108
> 5a048b4c2c04b7 Zelong Dong 2023-05-11 109 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> 5a048b4c2c04b7 Zelong Dong 2023-05-11 110 if (IS_ERR_OR_NULL(res)) {
> 5a048b4c2c04b7 Zelong Dong 2023-05-11 @111 dev_err(&pdev->dev, "get mem resource error, %ld\n",
> 5a048b4c2c04b7 Zelong Dong 2023-05-11 112 PTR_ERR(res));
> 5a048b4c2c04b7 Zelong Dong 2023-05-11 113 return PTR_ERR(res);
>
> The platform_get_resource() function returns NULL on failure. It never
> returns error pointers. This means that return PTR_ERR(res); returns
> 0 (which means success). Please read my blog for more information.
> https://staticthinking.wordpress.com/2022/08/01/mixing-error-pointers-and-null/
>
> This should be:
>
> res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> if (!res) {
> dev_err(&pdev->dev, "get mem resource error\n");
> return -EINVAL;
> }
>
> 5a048b4c2c04b7 Zelong Dong 2023-05-11 114 }
> 5a048b4c2c04b7 Zelong Dong 2023-05-11 115
> 5a048b4c2c04b7 Zelong Dong 2023-05-11 116 res_start = devm_ioremap_resource(&pdev->dev, res);
> 5a048b4c2c04b7 Zelong Dong 2023-05-11 117 meson_ir_regmap_config.max_register = resource_size(res) - 4;
> 5a048b4c2c04b7 Zelong Dong 2023-05-11 118 ir->reg = devm_regmap_init_mmio(&pdev->dev, res_start,
> 5a048b4c2c04b7 Zelong Dong 2023-05-11 119 &meson_ir_regmap_config);
> 9e2e4382ec72d9 Ding Xiang 2019-06-18 120 if (IS_ERR(ir->reg))
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 121 return PTR_ERR(ir->reg);
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 122
> 1ffc931c320a8a Heiner Kallweit 2017-04-12 123 irq = platform_get_irq(pdev, 0);
> 97299a3035328d Stephen Boyd 2019-07-30 124 if (irq < 0)
> 1ffc931c320a8a Heiner Kallweit 2017-04-12 125 return irq;
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 126
> 705aa578d408f6 Heiner Kallweit 2017-04-12 127 ir->rc = devm_rc_allocate_device(dev, RC_DRIVER_IR_RAW);
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 128 if (!ir->rc) {
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 129 dev_err(dev, "failed to allocate rc device\n");
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 130 return -ENOMEM;
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 131 }
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 132
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 133 ir->rc->priv = ir;
> 518f4b26be1ebf Sean Young 2017-07-01 134 ir->rc->device_name = DRIVER_NAME;
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 135 ir->rc->input_phys = DRIVER_NAME "/input0";
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 136 ir->rc->input_id.bustype = BUS_HOST;
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 137 map_name = of_get_property(node, "linux,rc-map-name", NULL);
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 138 ir->rc->map_name = map_name ? map_name : RC_MAP_EMPTY;
> 6d741bfed5ed06 Sean Young 2017-08-07 139 ir->rc->allowed_protocols = RC_PROTO_BIT_ALL_IR_DECODER;
> 5a048b4c2c04b7 Zelong Dong 2023-05-11 140 ir->rc->rx_resolution = MESON_RAW_TRATE;
> b358e747aebc4a Sean Young 2018-03-12 141 ir->rc->min_timeout = 1;
> b358e747aebc4a Sean Young 2018-03-12 142 ir->rc->timeout = IR_DEFAULT_TIMEOUT;
> b358e747aebc4a Sean Young 2018-03-12 143 ir->rc->max_timeout = 10 * IR_DEFAULT_TIMEOUT;
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 144 ir->rc->driver_name = DRIVER_NAME;
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 145
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 146 spin_lock_init(&ir->lock);
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 147 platform_set_drvdata(pdev, ir);
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 148
> 705aa578d408f6 Heiner Kallweit 2017-04-12 149 ret = devm_rc_register_device(dev, ir->rc);
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 150 if (ret) {
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 151 dev_err(dev, "failed to register rc device\n");
> 705aa578d408f6 Heiner Kallweit 2017-04-12 152 return ret;
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 153 }
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 154
> 611ee552a538b0 Heiner Kallweit 2017-04-12 155 ret = devm_request_irq(dev, irq, meson_ir_irq, 0, NULL, ir);
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 156 if (ret) {
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 157 dev_err(dev, "failed to request irq\n");
> 705aa578d408f6 Heiner Kallweit 2017-04-12 158 return ret;
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 159 }
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 160
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 161 /* Reset the decoder */
> 5a048b4c2c04b7 Zelong Dong 2023-05-11 162 regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_RESET,
> 5a048b4c2c04b7 Zelong Dong 2023-05-11 163 IR_DEC_REG1_RESET);
> 5a048b4c2c04b7 Zelong Dong 2023-05-11 164 regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_RESET, 0);
> 6edf27ee258925 Neil Armstrong 2016-08-20 165
> 6edf27ee258925 Neil Armstrong 2016-08-20 166 /* Set general operation mode (= raw/software decoding) */
> 6edf27ee258925 Neil Armstrong 2016-08-20 167 if (of_device_is_compatible(node, "amlogic,meson6-ir"))
> 5a048b4c2c04b7 Zelong Dong 2023-05-11 168 regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_MODE,
> 5a048b4c2c04b7 Zelong Dong 2023-05-11 169 FIELD_PREP(IR_DEC_REG1_MODE, DEC_MODE_RAW));
> 6edf27ee258925 Neil Armstrong 2016-08-20 170 else
> 5a048b4c2c04b7 Zelong Dong 2023-05-11 171 regmap_update_bits(ir->reg, IR_DEC_REG2, IR_DEC_REG2_MODE,
> 5a048b4c2c04b7 Zelong Dong 2023-05-11 172 FIELD_PREP(IR_DEC_REG2_MODE, DEC_MODE_RAW));
> 6edf27ee258925 Neil Armstrong 2016-08-20 173
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 174 /* Set rate */
> 5a048b4c2c04b7 Zelong Dong 2023-05-11 175 regmap_update_bits(ir->reg, IR_DEC_REG0, IR_DEC_REG0_BASE_TIME,
> 5a048b4c2c04b7 Zelong Dong 2023-05-11 176 FIELD_PREP(IR_DEC_REG0_BASE_TIME,
> 5a048b4c2c04b7 Zelong Dong 2023-05-11 177 MESON_RAW_TRATE - 1));
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 178 /* IRQ on rising and falling edges */
> 5a048b4c2c04b7 Zelong Dong 2023-05-11 179 regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_IRQSEL,
> 5a048b4c2c04b7 Zelong Dong 2023-05-11 180 FIELD_PREP(IR_DEC_REG1_IRQSEL, IRQSEL_RISE_FALL));
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 181 /* Enable the decoder */
> 5a048b4c2c04b7 Zelong Dong 2023-05-11 182 regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_ENABLE,
> 5a048b4c2c04b7 Zelong Dong 2023-05-11 183 IR_DEC_REG1_ENABLE);
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 184
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 185 dev_info(dev, "receiver initialized\n");
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 186
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 187 return 0;
> 12ddbadf383d55 Beniamino Galvani 2014-11-18 188 }
>
> --
> 0-DAY CI Kernel Test Service
> https://github.com/intel/lkp-tests
>
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^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] media: rc: meson-ir: support MMIO regmaps to access registers
2023-05-16 11:47 ` Zelong Dong
@ 2023-05-16 11:52 ` Dan Carpenter
0 siblings, 0 replies; 7+ messages in thread
From: Dan Carpenter @ 2023-05-16 11:52 UTC (permalink / raw)
To: Zelong Dong
Cc: oe-kbuild, Neil Armstrong, Sean Young, Mauro Carvalho Chehab,
Rob Herring, Jerome Brunet, Kevin Hilman, Martin Blumenstingl,
lkp, oe-kbuild-all, linux-media, linux-amlogic, Qianggui.Song,
Yonghui.Yu, kelvin.zhang
On Tue, May 16, 2023 at 07:47:24PM +0800, Zelong Dong wrote:
> Hi Dan Carpenter,
>
> Thanks for your review.
>
> Neil suggest to use devm_platform_ioremap_resource(), would it be better
> like this?
>
> res_start = devm_platform_ioremap_resource(pdev, 0);;
> if (IS_ERR(res_start))
> return PTR_ERR(res_start);
>
> ir->reg = devm_regmap_init_mmio(&pdev->dev, res_start,
> &meson_ir_regmap_config);
> if (IS_ERR(ir->reg))
> return PTR_ERR(ir->reg);
Yep. That works.
regards,
dan carpenter
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^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2023-05-16 12:04 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-05-11 3:43 [PATCH] media: rc: meson-ir: support MMIO regmaps to access registers zelong dong
2023-05-11 8:31 ` Neil Armstrong
2023-05-12 12:19 ` Zelong Dong
2023-05-12 13:24 ` neil.armstrong
2023-05-12 13:08 ` Dan Carpenter
2023-05-16 11:47 ` Zelong Dong
2023-05-16 11:52 ` Dan Carpenter
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