[PATCH] crypto: amlogic - Free channel IRQs before disabling the clock

[PATCH] crypto: amlogic - Free channel IRQs before disabling the clock

[Myeonghun Pak]

The channel IRQs are requested before the managed channel array is
allocated. Automatic cleanup consequently frees that array before
releasing the IRQs. An interrupt handler that has already read a channel
completion status can still write chanlist[flow].status and complete the
channel completion after the array is released. A cipher timeout allows
such a late handler even after its crypto engine becomes idle.

Release the IRQs explicitly before disabling the bus clock and before
devres can release the channel array. Do this after crypto_engine_exit()
so normal requests retain their interrupt-driven completion while the
engines drain. Use the same cleanup on probe failures after the clock
has been enabled, preserving the channel allocator's existing unwind.

This issue was identified as part of our ongoing research while
reviewing kernel code.

Fixes: 48fe583fe541 ("crypto: amlogic - Add crypto accelerator for amlogic GXL")
Assisted-by: LLM
Co-developed-by: Ijae Kim <ae878000@gmail.com>
Signed-off-by: Ijae Kim <ae878000@gmail.com>
Signed-off-by: Myeonghun Pak <mhun512@gmail.com>
---
Compile-tested with GCC, W=1 (arm). No runtime testing.

This bounds IRQ access to completion state and registers; hardware DMA
handling after a cipher timeout is unchanged.

 drivers/crypto/amlogic/amlogic-gxl-core.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c
index 169c6ee..333db2e 100644
--- a/drivers/crypto/amlogic/amlogic-gxl-core.c
+++ b/drivers/crypto/amlogic/amlogic-gxl-core.c
@@ -136,6 +136,14 @@ static int meson_debugfs_show(struct seq_file *seq, void *v)
 }
 DEFINE_SHOW_ATTRIBUTE(meson_debugfs);
 
+static void meson_free_irqs(struct meson_dev *mc)
+{
+	int i;
+
+	for (i = 0; i < MAXFLOW; i++)
+		devm_free_irq(mc->dev, mc->irqs[i], mc);
+}
+
 static void meson_free_chanlist(struct meson_dev *mc, int i)
 {
 	while (i >= 0) {
@@ -291,6 +299,7 @@ static int meson_crypto_probe(struct platform_device *pdev)
 	meson_unregister_algs(mc);
 	meson_free_chanlist(mc, MAXFLOW - 1);
 error_flow:
+	meson_free_irqs(mc);
 	clk_disable_unprepare(mc->busclk);
 	return err;
 }
@@ -306,6 +315,7 @@ static void meson_crypto_remove(struct platform_device *pdev)
 	meson_unregister_algs(mc);
 
 	meson_free_chanlist(mc, MAXFLOW - 1);
+	meson_free_irqs(mc);
 
 	clk_disable_unprepare(mc->busclk);
 }

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Re: [PATCH] crypto: amlogic - Free channel IRQs before disabling the clock

[Herbert Xu]

On Wed, Oct 14, 2026 at 10:41:48PM -0400, Myeonghun Pak wrote:
> The channel IRQs are requested before the managed channel array is
> allocated. Automatic cleanup consequently frees that array before
> releasing the IRQs. An interrupt handler that has already read a channel
> completion status can still write chanlist[flow].status and complete the
> channel completion after the array is released. A cipher timeout allows
> such a late handler even after its crypto engine becomes idle.
> 
> Release the IRQs explicitly before disabling the bus clock and before
> devres can release the channel array. Do this after crypto_engine_exit()
> so normal requests retain their interrupt-driven completion while the
> engines drain. Use the same cleanup on probe failures after the clock
> has been enabled, preserving the channel allocator's existing unwind.
> 
> This issue was identified as part of our ongoing research while
> reviewing kernel code.
> 
> Fixes: 48fe583fe541 ("crypto: amlogic - Add crypto accelerator for amlogic GXL")
> Assisted-by: LLM
> Co-developed-by: Ijae Kim <ae878000@gmail.com>
> Signed-off-by: Ijae Kim <ae878000@gmail.com>
> Signed-off-by: Myeonghun Pak <mhun512@gmail.com>
> ---
> Compile-tested with GCC, W=1 (arm). No runtime testing.
> 
> This bounds IRQ access to completion state and registers; hardware DMA
> handling after a cipher timeout is unchanged.
> 
>  drivers/crypto/amlogic/amlogic-gxl-core.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)

The patch description does not apply to the current cryptodev tree.
Please review this change:

commit e273759a0e29395a6e35e5f17ce03b2690476b2c
Author: Mohamad Raizudeen <raizudeen.kerneldev@gmail.com>
Date:   Wed Sep 16 23:12:27 2026 +0530

    crypto: amlogic - Use devm APIs for clock management

    The driver currently gets the core clock and manually enables it using
    clk_prepare_enable(). This requires matching calls to
    clk_disable_unprepare() in the error paths and remove function.

    Switch to devm_clk_get_enabled() instead. This lets the kernel handle
    enabling and disabling the clock automatically, which allow us to drop
    the manual cleanup code and keeps the probe function simple.

    Reported-by: kernel test robot <lkp@intel.com>
    Closes: https://lore.kernel.org/oe-kbuild-all/202608310329.QgxCCMs1-lkp@intel.com/
    Signed-off-by: Mohamad Raizudeen <raizudeen.kerneldev@gmail.com>
    Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

Thanks,
-- 
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

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