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From: narmstrong@baylibre.com (Neil Armstrong)
To: linus-amlogic@lists.infradead.org
Subject: [PATCH] pinctrl: meson: fix pull enable register calculation
Date: Tue, 13 Nov 2018 14:34:08 +0100	[thread overview]
Message-ID: <cee83bac-a55a-0c60-e410-9c1ce4c6b60d@baylibre.com> (raw)
In-Reply-To: <20181113105536.6459-1-jbrunet@baylibre.com>

On 13/11/2018 11:55, Jerome Brunet wrote:
> We just changed the code so we apply bias disable on the correct
> register but forgot to align the register calculation. The result
> is that we apply the change on the correct register, but possibly
> at the incorrect offset/bit
> 
> This went undetected because offsets tends to be the same between
> REG_PULL and REG_PULLEN for a given pin the EE controller. This
> is not true for the AO controller.
> 
> Fixes: e39f9dd8206a ("pinctrl: meson: fix pinconf bias disable")
> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
> ---
>  drivers/pinctrl/meson/pinctrl-meson.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c
> index 53d449076dee..ea87d739f534 100644
> --- a/drivers/pinctrl/meson/pinctrl-meson.c
> +++ b/drivers/pinctrl/meson/pinctrl-meson.c
> @@ -191,7 +191,8 @@ static int meson_pinconf_set(struct pinctrl_dev *pcdev, unsigned int pin,
>  		case PIN_CONFIG_BIAS_DISABLE:
>  			dev_dbg(pc->dev, "pin %u: disable bias\n", pin);
>  
> -			meson_calc_reg_and_bit(bank, pin, REG_PULL, &reg, &bit);
> +			meson_calc_reg_and_bit(bank, pin, REG_PULLEN, &reg,
> +					       &bit);
>  			ret = regmap_update_bits(pc->reg_pullen, reg,
>  						 BIT(bit), 0);
>  			if (ret)
> 

I saw it aswell,

Acked-by: Neil Armstrong <narmstrong@baylibre.com>

  reply	other threads:[~2018-11-13 13:34 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-13 10:55 Jerome Brunet
2018-11-13 13:34 ` Neil Armstrong [this message]
2018-11-19 13:18 ` Linus Walleij

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