* [PATCH V3 1/2] tty: serial: meson: Add a 12MHz internal clock rate to calculate baud rate in order to meet the baud rate requirements of special BT modules
2022-04-22 11:13 [PATCH V3 0/2] Add q 12MHz internal clock rate to calculate Yu Tu
@ 2022-04-22 11:13 ` Yu Tu
2022-04-22 12:30 ` Neil Armstrong
2022-04-22 11:13 ` [PATCH V3 2/2] tty: serial: meson: Added S4 SOC compatibility Yu Tu
2022-04-22 12:30 ` [PATCH V3 0/2] Add q 12MHz internal clock rate to calculate Neil Armstrong
2 siblings, 1 reply; 6+ messages in thread
From: Yu Tu @ 2022-04-22 11:13 UTC (permalink / raw)
To: linux-serial, linux-arm-kernel, linux-amlogic, linux-kernel,
Greg Kroah-Hartman, Neil Armstrong, Kevin Hilman, Jerome Brunet
Cc: Jiri Slaby, Martin Blumenstingl, Yu Tu
A /2 divider over XTAL was introduced since G12A, and is preferred
to be used over the still present /3 divider since it provides much
closer frequencies vs the request baudrate. Especially the BT module
uses 3Mhz baud rate. 8Mhz calculations can lead to baud rate bias,
causing some problems.
Signed-off-by: Yu Tu <yu.tu@amlogic.com>
---
drivers/tty/serial/meson_uart.c | 17 +++++++++++++++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/drivers/tty/serial/meson_uart.c b/drivers/tty/serial/meson_uart.c
index 8e59624935af..58bd2723c004 100644
--- a/drivers/tty/serial/meson_uart.c
+++ b/drivers/tty/serial/meson_uart.c
@@ -68,6 +68,7 @@
#define AML_UART_BAUD_MASK 0x7fffff
#define AML_UART_BAUD_USE BIT(23)
#define AML_UART_BAUD_XTAL BIT(24)
+#define AML_UART_BAUD_XTAL_DIV2 BIT(27)
#define AML_UART_PORT_NUM 12
#define AML_UART_PORT_OFFSET 6
@@ -80,6 +81,10 @@ static struct uart_driver meson_uart_driver;
static struct uart_port *meson_ports[AML_UART_PORT_NUM];
+struct meson_uart_data {
+ bool has_xtal_div2;
+};
+
static void meson_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
{
}
@@ -293,13 +298,20 @@ static int meson_uart_startup(struct uart_port *port)
static void meson_uart_change_speed(struct uart_port *port, unsigned long baud)
{
- u32 val;
+ const struct meson_uart_data *private_data = port->private_data;
+ u32 val = 0;
while (!meson_uart_tx_empty(port))
cpu_relax();
if (port->uartclk == 24000000) {
- val = DIV_ROUND_CLOSEST(port->uartclk / 3, baud) - 1;
+ unsigned int xtal_div = 3;
+
+ if (private_data && private_data->has_xtal_div2) {
+ xtal_div = 2;
+ val |= AML_UART_BAUD_XTAL_DIV2;
+ }
+ val |= DIV_ROUND_CLOSEST(port->uartclk / xtal_div, baud) - 1;
val |= AML_UART_BAUD_XTAL;
} else {
val = DIV_ROUND_CLOSEST(port->uartclk / 4, baud) - 1;
@@ -749,6 +761,7 @@ static int meson_uart_probe(struct platform_device *pdev)
port->x_char = 0;
port->ops = &meson_uart_ops;
port->fifosize = fifosize;
+ port->private_data = (void *)device_get_match_data(&pdev->dev);
meson_ports[pdev->id] = port;
platform_set_drvdata(pdev, port);
--
2.33.1
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^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH V3 1/2] tty: serial: meson: Add a 12MHz internal clock rate to calculate baud rate in order to meet the baud rate requirements of special BT modules
2022-04-22 11:13 ` [PATCH V3 1/2] tty: serial: meson: Add a 12MHz internal clock rate to calculate baud rate in order to meet the baud rate requirements of special BT modules Yu Tu
@ 2022-04-22 12:30 ` Neil Armstrong
0 siblings, 0 replies; 6+ messages in thread
From: Neil Armstrong @ 2022-04-22 12:30 UTC (permalink / raw)
To: Yu Tu, linux-serial, linux-arm-kernel, linux-amlogic,
linux-kernel, Greg Kroah-Hartman, Kevin Hilman, Jerome Brunet
Cc: Jiri Slaby, Martin Blumenstingl
On 22/04/2022 13:13, Yu Tu wrote:
> A /2 divider over XTAL was introduced since G12A, and is preferred
> to be used over the still present /3 divider since it provides much
> closer frequencies vs the request baudrate. Especially the BT module
> uses 3Mhz baud rate. 8Mhz calculations can lead to baud rate bias,
> causing some problems.
>
> Signed-off-by: Yu Tu <yu.tu@amlogic.com>
> ---
> drivers/tty/serial/meson_uart.c | 17 +++++++++++++++--
> 1 file changed, 15 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/tty/serial/meson_uart.c b/drivers/tty/serial/meson_uart.c
> index 8e59624935af..58bd2723c004 100644
> --- a/drivers/tty/serial/meson_uart.c
> +++ b/drivers/tty/serial/meson_uart.c
> @@ -68,6 +68,7 @@
> #define AML_UART_BAUD_MASK 0x7fffff
> #define AML_UART_BAUD_USE BIT(23)
> #define AML_UART_BAUD_XTAL BIT(24)
> +#define AML_UART_BAUD_XTAL_DIV2 BIT(27)
>
> #define AML_UART_PORT_NUM 12
> #define AML_UART_PORT_OFFSET 6
> @@ -80,6 +81,10 @@ static struct uart_driver meson_uart_driver;
>
> static struct uart_port *meson_ports[AML_UART_PORT_NUM];
>
> +struct meson_uart_data {
> + bool has_xtal_div2;
> +};
> +
> static void meson_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
> {
> }
> @@ -293,13 +298,20 @@ static int meson_uart_startup(struct uart_port *port)
>
> static void meson_uart_change_speed(struct uart_port *port, unsigned long baud)
> {
> - u32 val;
> + const struct meson_uart_data *private_data = port->private_data;
> + u32 val = 0;
>
> while (!meson_uart_tx_empty(port))
> cpu_relax();
>
> if (port->uartclk == 24000000) {
> - val = DIV_ROUND_CLOSEST(port->uartclk / 3, baud) - 1;
> + unsigned int xtal_div = 3;
> +
> + if (private_data && private_data->has_xtal_div2) {
> + xtal_div = 2;
> + val |= AML_UART_BAUD_XTAL_DIV2;
> + }
> + val |= DIV_ROUND_CLOSEST(port->uartclk / xtal_div, baud) - 1;
> val |= AML_UART_BAUD_XTAL;
> } else {
> val = DIV_ROUND_CLOSEST(port->uartclk / 4, baud) - 1;
> @@ -749,6 +761,7 @@ static int meson_uart_probe(struct platform_device *pdev)
> port->x_char = 0;
> port->ops = &meson_uart_ops;
> port->fifosize = fifosize;
> + port->private_data = (void *)device_get_match_data(&pdev->dev);
>
> meson_ports[pdev->id] = port;
> platform_set_drvdata(pdev, port);
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
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^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH V3 2/2] tty: serial: meson: Added S4 SOC compatibility
2022-04-22 11:13 [PATCH V3 0/2] Add q 12MHz internal clock rate to calculate Yu Tu
2022-04-22 11:13 ` [PATCH V3 1/2] tty: serial: meson: Add a 12MHz internal clock rate to calculate baud rate in order to meet the baud rate requirements of special BT modules Yu Tu
@ 2022-04-22 11:13 ` Yu Tu
2022-04-22 12:30 ` Neil Armstrong
2022-04-22 12:30 ` [PATCH V3 0/2] Add q 12MHz internal clock rate to calculate Neil Armstrong
2 siblings, 1 reply; 6+ messages in thread
From: Yu Tu @ 2022-04-22 11:13 UTC (permalink / raw)
To: linux-serial, linux-arm-kernel, linux-amlogic, linux-kernel,
Greg Kroah-Hartman, Neil Armstrong, Kevin Hilman, Jerome Brunet
Cc: Jiri Slaby, Martin Blumenstingl, Yu Tu
Make UART driver compatible with S4 SOC UART. Meanwhile, the S4 SOC
UART uses 12MHz as the clock source for baud rate calculations.
Signed-off-by: Yu Tu <yu.tu@amlogic.com>
---
drivers/tty/serial/meson_uart.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/tty/serial/meson_uart.c b/drivers/tty/serial/meson_uart.c
index 58bd2723c004..c748e5dd5348 100644
--- a/drivers/tty/serial/meson_uart.c
+++ b/drivers/tty/serial/meson_uart.c
@@ -790,11 +790,19 @@ static int meson_uart_remove(struct platform_device *pdev)
return 0;
}
+static struct meson_uart_data s4_uart_data = {
+ .has_xtal_div2 = true,
+};
+
static const struct of_device_id meson_uart_dt_match[] = {
{ .compatible = "amlogic,meson6-uart" },
{ .compatible = "amlogic,meson8-uart" },
{ .compatible = "amlogic,meson8b-uart" },
{ .compatible = "amlogic,meson-gx-uart" },
+ {
+ .compatible = "amlogic,meson-s4-uart",
+ .data = (void *)&s4_uart_data,
+ },
{ /* sentinel */ },
};
MODULE_DEVICE_TABLE(of, meson_uart_dt_match);
--
2.33.1
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^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH V3 2/2] tty: serial: meson: Added S4 SOC compatibility
2022-04-22 11:13 ` [PATCH V3 2/2] tty: serial: meson: Added S4 SOC compatibility Yu Tu
@ 2022-04-22 12:30 ` Neil Armstrong
0 siblings, 0 replies; 6+ messages in thread
From: Neil Armstrong @ 2022-04-22 12:30 UTC (permalink / raw)
To: Yu Tu, linux-serial, linux-arm-kernel, linux-amlogic,
linux-kernel, Greg Kroah-Hartman, Kevin Hilman, Jerome Brunet
Cc: Jiri Slaby, Martin Blumenstingl
On 22/04/2022 13:13, Yu Tu wrote:
> Make UART driver compatible with S4 SOC UART. Meanwhile, the S4 SOC
> UART uses 12MHz as the clock source for baud rate calculations.
>
> Signed-off-by: Yu Tu <yu.tu@amlogic.com>
> ---
> drivers/tty/serial/meson_uart.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/tty/serial/meson_uart.c b/drivers/tty/serial/meson_uart.c
> index 58bd2723c004..c748e5dd5348 100644
> --- a/drivers/tty/serial/meson_uart.c
> +++ b/drivers/tty/serial/meson_uart.c
> @@ -790,11 +790,19 @@ static int meson_uart_remove(struct platform_device *pdev)
> return 0;
> }
>
> +static struct meson_uart_data s4_uart_data = {
> + .has_xtal_div2 = true,
> +};
> +
> static const struct of_device_id meson_uart_dt_match[] = {
> { .compatible = "amlogic,meson6-uart" },
> { .compatible = "amlogic,meson8-uart" },
> { .compatible = "amlogic,meson8b-uart" },
> { .compatible = "amlogic,meson-gx-uart" },
> + {
> + .compatible = "amlogic,meson-s4-uart",
> + .data = (void *)&s4_uart_data,
> + },
> { /* sentinel */ },
> };
> MODULE_DEVICE_TABLE(of, meson_uart_dt_match);
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH V3 0/2] Add q 12MHz internal clock rate to calculate
2022-04-22 11:13 [PATCH V3 0/2] Add q 12MHz internal clock rate to calculate Yu Tu
2022-04-22 11:13 ` [PATCH V3 1/2] tty: serial: meson: Add a 12MHz internal clock rate to calculate baud rate in order to meet the baud rate requirements of special BT modules Yu Tu
2022-04-22 11:13 ` [PATCH V3 2/2] tty: serial: meson: Added S4 SOC compatibility Yu Tu
@ 2022-04-22 12:30 ` Neil Armstrong
2 siblings, 0 replies; 6+ messages in thread
From: Neil Armstrong @ 2022-04-22 12:30 UTC (permalink / raw)
To: Yu Tu, linux-serial, linux-arm-kernel, linux-amlogic,
linux-kernel, Greg Kroah-Hartman, Kevin Hilman, Jerome Brunet
Cc: Jiri Slaby, Martin Blumenstingl
On 22/04/2022 13:13, Yu Tu wrote:
> 1.Added 12Mhz as the clock source for calculating baud rate.
>
> 2.Added S4 SOC compatibility.
>
>
> Yu Tu (2):
> tty: serial: meson: Add a 12MHz internal clock rate to calculate baud
> rate in order to meet the baud rate requirements of special BT
> modules
> tty: serial: meson: Added S4 SOC compatibility
>
> V1 -> V2: Change format as discussed in the email.
> V2 -> V3: Change format as discussed in the email.
>
> Link:https://lore.kernel.org/linux-amlogic/20220418053202.24528-2-yu.tu@amlogic.com/
>
> drivers/tty/serial/meson_uart.c | 25 +++++++++++++++++++++++--
> 1 file changed, 23 insertions(+), 2 deletions(-)
>
>
> base-commit: 05fe70dd2efd13de700c2dfe5169d3a7a5050bc2
Thanks for this v3, all fine for me !
Neil
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^ permalink raw reply [flat|nested] 6+ messages in thread