From: Maxime Chevallier <maxime.chevallier@bootlin.com>
To: Lucas Tanure <tanure@linux.com>,
xianwei.zhao@amlogic.com, Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@kernel.org>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Neil Armstrong <neil.armstrong@linaro.org>,
Kevin Hilman <khilman@baylibre.com>,
Jerome Brunet <jbrunet@baylibre.com>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [RFC PATCH v2 4/7] net: stmmac: dwmac-meson8b: add support for the Amlogic T7
Date: Wed, 7 Oct 2026 11:36:32 +0200 [thread overview]
Message-ID: <ea812192-184b-4726-9ff4-abeca3a3b498@bootlin.com> (raw)
In-Reply-To: <20261007082627.63807-5-tanure@linux.com>
Hi,
On 10/7/26 10:26, Lucas Tanure wrote:
> The glue registers on the T7 are laid out exactly as the G12A ones, RX
> delay field included, so the T7 can reuse the G12A settings.
>
> What it does not share is how the controller reaches memory. That path
> runs through a pipeline stage with a gate of its own, and no other
> device has any use for that gate. Nothing claims it, so it is switched
> off as unused and a transfer that has started can never finish.
>
> Without that gate the controller cannot do DMA at all, so it is
> required rather than optional: a clear probe failure beats an
> undiagnosable hang later.
>
> Assisted-by: LLM
> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
> Signed-off-by: Lucas Tanure <tanure@linux.com>
Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Maxime
> ---
> .../ethernet/stmicro/stmmac/dwmac-meson8b.c | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
>
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c
> index d73dfd0ac167..dd10d719ab84 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c
> @@ -81,6 +81,7 @@ struct meson8b_dwmac;
> struct meson8b_dwmac_data {
> int (*set_phy_mode)(struct meson8b_dwmac *dwmac);
> bool has_prg_eth1_rgmii_rx_delay;
> + bool has_pipeline_clk;
> };
>
> struct meson8b_dwmac {
> @@ -402,6 +403,7 @@ static int meson8b_dwmac_probe(struct platform_device *pdev)
> struct plat_stmmacenet_data *plat_dat;
> struct stmmac_resources stmmac_res;
> struct meson8b_dwmac *dwmac;
> + struct clk *pipeline_clk;
> u32 tx_delay_ps;
> int ret;
>
> @@ -485,6 +487,13 @@ static int meson8b_dwmac_probe(struct platform_device *pdev)
> if (IS_ERR(dwmac->timing_adj_clk))
> return PTR_ERR(dwmac->timing_adj_clk);
>
> + if (dwmac->data->has_pipeline_clk) {
> + pipeline_clk = devm_clk_get_enabled(dwmac->dev, "pipeline");
> + if (IS_ERR(pipeline_clk))
> + return dev_err_probe(dwmac->dev, PTR_ERR(pipeline_clk),
> + "missing pipeline clock\n");
> + }
> +
> ret = meson8b_init_rgmii_delays(dwmac);
> if (ret)
> return ret;
> @@ -521,6 +530,12 @@ static const struct meson8b_dwmac_data meson_g12a_dwmac_data = {
> .has_prg_eth1_rgmii_rx_delay = true,
> };
>
> +static const struct meson8b_dwmac_data meson_t7_dwmac_data = {
> + .set_phy_mode = meson_axg_set_phy_mode,
> + .has_prg_eth1_rgmii_rx_delay = true,
> + .has_pipeline_clk = true,
> +};
> +
> static const struct of_device_id meson8b_dwmac_match[] = {
> {
> .compatible = "amlogic,meson8b-dwmac",
> @@ -542,6 +557,10 @@ static const struct of_device_id meson8b_dwmac_match[] = {
> .compatible = "amlogic,meson-g12a-dwmac",
> .data = &meson_g12a_dwmac_data,
> },
> + {
> + .compatible = "amlogic,t7-dwmac",
> + .data = &meson_t7_dwmac_data,
> + },
> { }
> };
> MODULE_DEVICE_TABLE(of, meson8b_dwmac_match);
text:
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Subject: Re: [RFC PATCH v2 4/7] net: stmmac: dwmac-meson8b: add support for
the Amlogic T7
To: Lucas Tanure <tanure@linux.com>, xianwei.zhao@amlogic.com,
Andrew Lunn <andrew+netdev@lunn.ch>, "David S. Miller"
<davem@davemloft.net>, Eric Dumazet <edumazet@kernel.org>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Neil Armstrong <neil.armstrong@linaro.org>,
Kevin Hilman <khilman@baylibre.com>, Jerome Brunet <jbrunet@baylibre.com>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org,
linux-kernel@vger.kernel.org
References: <20261007082627.63807-1-tanure@linux.com>
<20261007082627.63807-5-tanure@linux.com>
Content-Language: en-US
From: Maxime Chevallier <maxime.chevallier@bootlin.com>
In-Reply-To: <20261007082627.63807-5-tanure@linux.com>
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X-Rspamd-Queue-Id: 622F411D500EF
Hi,
On 10/7/26 10:26, Lucas Tanure wrote:
> The glue registers on the T7 are laid out exactly as the G12A ones, RX
> delay field included, so the T7 can reuse the G12A settings.
>
> What it does not share is how the controller reaches memory. That path
> runs through a pipeline stage with a gate of its own, and no other
> device has any use for that gate. Nothing claims it, so it is switched
> off as unused and a transfer that has started can never finish.
>
> Without that gate the controller cannot do DMA at all, so it is
> required rather than optional: a clear probe failure beats an
> undiagnosable hang later.
>
> Assisted-by: LLM
> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
> Signed-off-by: Lucas Tanure <tanure@linux.com>
Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Maxime
> ---
> .../ethernet/stmicro/stmmac/dwmac-meson8b.c | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
>
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c
> index d73dfd0ac167..dd10d719ab84 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c
> @@ -81,6 +81,7 @@ struct meson8b_dwmac;
> struct meson8b_dwmac_data {
> int (*set_phy_mode)(struct meson8b_dwmac *dwmac);
> bool has_prg_eth1_rgmii_rx_delay;
> + bool has_pipeline_clk;
> };
>
> struct meson8b_dwmac {
> @@ -402,6 +403,7 @@ static int meson8b_dwmac_probe(struct platform_device *pdev)
> struct plat_stmmacenet_data *plat_dat;
> struct stmmac_resources stmmac_res;
> struct meson8b_dwmac *dwmac;
> + struct clk *pipeline_clk;
> u32 tx_delay_ps;
> int ret;
>
> @@ -485,6 +487,13 @@ static int meson8b_dwmac_probe(struct platform_device *pdev)
> if (IS_ERR(dwmac->timing_adj_clk))
> return PTR_ERR(dwmac->timing_adj_clk);
>
> + if (dwmac->data->has_pipeline_clk) {
> + pipeline_clk = devm_clk_get_enabled(dwmac->dev, "pipeline");
> + if (IS_ERR(pipeline_clk))
> + return dev_err_probe(dwmac->dev, PTR_ERR(pipeline_clk),
> + "missing pipeline clock\n");
> + }
> +
> ret = meson8b_init_rgmii_delays(dwmac);
> if (ret)
> return ret;
> @@ -521,6 +530,12 @@ static const struct meson8b_dwmac_data meson_g12a_dwmac_data = {
> .has_prg_eth1_rgmii_rx_delay = true,
> };
>
> +static const struct meson8b_dwmac_data meson_t7_dwmac_data = {
> + .set_phy_mode = meson_axg_set_phy_mode,
> + .has_prg_eth1_rgmii_rx_delay = true,
> + .has_pipeline_clk = true,
> +};
> +
> static const struct of_device_id meson8b_dwmac_match[] = {
> {
> .compatible = "amlogic,meson8b-dwmac",
> @@ -542,6 +557,10 @@ static const struct of_device_id meson8b_dwmac_match[] = {
> .compatible = "amlogic,meson-g12a-dwmac",
> .data = &meson_g12a_dwmac_data,
> },
> + {
> + .compatible = "amlogic,t7-dwmac",
> + .data = &meson_t7_dwmac_data,
> + },
> { }
> };
> MODULE_DEVICE_TABLE(of, meson8b_dwmac_match);
_______________________________________________
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next prev parent reply other threads:[~2026-10-13 17:57 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-07 8:26 [RFC PATCH v2 0/7] Add ethernet " Lucas Tanure
2026-10-07 8:26 ` [RFC PATCH v2 1/7] net: stmmac: dwmac-meson8b: let the controller apply the RGMII delays Lucas Tanure
2026-10-07 9:35 ` Maxime Chevallier
2026-10-07 12:58 ` Andrew Lunn
2026-10-07 8:26 ` [RFC PATCH v2 2/7] dt-bindings: net: amlogic,meson-dwmac: list the compatible combinations Lucas Tanure
2026-10-07 8:26 ` [RFC PATCH v2 3/7] dt-bindings: net: amlogic,meson-dwmac: add amlogic,t7-dwmac Lucas Tanure
2026-10-07 9:51 ` Conor Dooley
2026-10-07 10:34 ` Lucas Tanure
2026-10-07 12:59 ` Conor Dooley
2026-10-07 12:35 ` Neil Armstrong
2026-10-07 13:07 ` Andrew Lunn
2026-10-07 13:06 ` Andrew Lunn
2026-10-08 8:26 ` sashiko-bot
2026-10-07 8:26 ` [RFC PATCH v2 4/7] net: stmmac: dwmac-meson8b: add support for the Amlogic T7 Lucas Tanure
2026-10-07 9:36 ` Maxime Chevallier [this message]
2026-10-07 8:26 ` [RFC PATCH v2 5/7] arm64: dts: amlogic: t7: add the ethernet pinctrl nodes Lucas Tanure
2026-10-07 8:26 ` [RFC PATCH v2 6/7] arm64: dts: amlogic: t7: add the ethernet controller Lucas Tanure
2026-10-07 13:12 ` Andrew Lunn
2026-10-07 13:34 ` Maxime Chevallier
2026-10-09 5:52 ` Lucas Tanure
2026-10-07 8:26 ` [RFC PATCH v2 7/7] arm64: dts: amlogic: t7: khadas-vim4: enable the ethernet port Lucas Tanure
2026-10-08 8:26 ` sashiko-bot
2026-10-07 13:01 ` [RFC PATCH v2 0/7] Add ethernet support for the Amlogic T7 Andrew Lunn
2026-10-09 5:59 ` Lucas Tanure
2026-10-09 12:13 ` Andrew Lunn
2026-10-09 20:52 ` Lucas Tanure
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