x86 descriptor base fetching performance opportunities

x86 descriptor base fetching performance opportunities

[cutaway]

This is something I've just started investigating, but preliminary
benchmarks of trial instruction sequences look VERY favorable for
conditional compilation of different code for those CPU's that can do a
BSWAP instruction.

The Linux src appears not conditionalized in any way in its handling of
descriptor get/set operations at the moment.

The fetching of descriptor bases is a necessarily clumsy affair on 386
resulting in several shift/rotate/masking operations because the upper 16
bytes of the base are split in a rather un-handy way in the 2nd dword of a
descriptor.

However, for 486 and better CPU's this un-handy layout looks like it can be
mitigated by BSWAP.  ex(pseudo-asm)

movl 4(des_ptr),eax   // Take hi-dword of descriptor
rol  8,eax            // AL=des-hi8, AH=des-hi-mid8
bswap eax             // Now, EAX high 16 == high 16 of descriptor
movw 2(des_ptr),ax    // Fill in the low 16 bits