Pentium IV cache line size

["BALBIR SINGH" <balbir.singh@wipro.com>]

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Hello, All,

Dave Jones sent out a patch about Pentium IV cacheline sizes,
please refer to

http://marc.theaimsgroup.com/?l=linux-kernel&m=100297450316163&w=2

to which Manfred Spraul responded

http://marc.theaimsgroup.com/?l=linux-kernel&m=100299763026680&w=2

I think the patch is correct and should be applied.

>From Pentium IV, System Programming Guide, Section 9.1, Page 9-2,
Table 9-1. Order # 245472


L1 Data Cache - Pentium 4 and Intel Xeon processors: 8 KBytes, 4-way set
associative, 64-byte
cache line size.


L2 Unified Cache - Pentium 4 and Intel Xeon processors: 256 KBytes 8-way
set associative,
sectored, 64-byte cache line size.

The point is that according to the specs both L1 and L2 cacheline sizes
are 64-byte.

Comments,
Balbir


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