From: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
To: Bjorn Andersson <andersson@kernel.org>
Cc: Linus Walleij <linusw@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Subject: Re: [PATCH v2 2/2] pinctrl: qcom: Introduce IPQ5210 TLMM driver
Date: Mon, 23 Mar 2026 12:16:26 +0530 [thread overview]
Message-ID: <01bd44db-32b7-4195-ad66-0a608b25dca3@oss.qualcomm.com> (raw)
In-Reply-To: <abtbnafiKkswWSy1@baldur>
On 3/19/2026 7:47 AM, Bjorn Andersson wrote:
> On Wed, Mar 18, 2026 at 12:44:31PM +0530, Kathiravan Thirumoorthy wrote:
>> diff --git a/drivers/pinctrl/qcom/pinctrl-ipq5210.c b/drivers/pinctrl/qcom/pinctrl-ipq5210.c
> [..]
>> +static const struct pinfunction ipq5210_functions[] = {
> [..]
>> + MSM_PIN_FUNCTION(qup_se5_l01),
>> + MSM_PIN_FUNCTION(qup_se5_l10),
>> + MSM_PIN_FUNCTION(qup_se5_l11),
>> + MSM_PIN_FUNCTION(qup_se5_l2),
>> + MSM_PIN_FUNCTION(qup_se5_l3),
>> + MSM_PIN_FUNCTION(qup_se5_l4),
>> + MSM_PIN_FUNCTION(qup_se5_l5),
> Listing each pin of each QUP SE as their own function forces the DT
> author to write one state definition per pin. Group these into their
> logical functions instead.
>
> Same thing with other logical functions that you have split into
> multiple separate functions.
Sure, will take care of this in next spin.
>
>> + MSM_PIN_FUNCTION(resout),
>> + MSM_PIN_FUNCTION(rx_los00),
>> + MSM_PIN_FUNCTION(rx_los01),
>> + MSM_PIN_FUNCTION(rx_los10),
>> + MSM_PIN_FUNCTION(rx_los11),
>> + MSM_PIN_FUNCTION(rx_los20),
>> + MSM_PIN_FUNCTION(rx_los21),
>> + MSM_PIN_FUNCTION(sdc_clk),
>> + MSM_PIN_FUNCTION(sdc_cmd),
>> + MSM_PIN_FUNCTION(sdc_data),
>> + MSM_PIN_FUNCTION(tsens_max),
>> +};
>> +
>> +static const struct msm_pingroup ipq5210_groups[] = {
>> + [0] = PINGROUP(0, sdc_data, qspi_data, pwm, _, _, _, _, _, _),
>> + [1] = PINGROUP(1, sdc_data, qspi_data, pwm, _, _, _, _, _, _),
>> + [2] = PINGROUP(2, sdc_data, qspi_data, pwm, _, _, _, _, _, _),
>> + [3] = PINGROUP(3, sdc_data, qspi_data, pwm, _, _, _, _, _, _),
>> + [4] = PINGROUP(4, sdc_cmd, qspi_cs_n, _, _, _, _, _, _, _),
>> + [5] = PINGROUP(5, sdc_clk, qspi_clk, _, _, _, _, _, _, _),
>> + [6] = PINGROUP(6, qup_se0_l2, led0, pwm, _, cri_trng0, qdss_tracedata_a, _, _, _),
>> + [7] = PINGROUP(7, qup_se0_l3, led1, pwm, _, cri_trng1, qdss_tracedata_a, _, _, _),
>> + [8] = PINGROUP(8, qup_se0_l0, pwm, audio_pri2, audio_pri2, _, cri_trng2, qdss_tracedata_a, _, _),
> How can both function 3 and 4 be "audio_pri2", do you expect the system
> integrator to be able to select function 4?
Function 3 and 4 are audio_pri_mclk_out and audio_pri_mclk_in
respectively and either one of them can be selected based on the codec's
mclock requirement. Let me expand the full function to avoid these
confusion in the next spin.
>
>> + [9] = PINGROUP(9, qup_se0_l1, led2, pwm, _, cri_trng3, qdss_tracedata_a, _, _, _),
>> + [10] = PINGROUP(10, pon_rx_los, qup_se3_l3, pwm, _, _, qdss_tracedata_a, _, _, _),
>> + [11] = PINGROUP(11, pon_active_led, qup_se3_l2, pwm, _, _, qdss_tracedata_a, _, _, _),
>> + [12] = PINGROUP(12, pon_tx_dis, qup_se2_l3, pwm, audio_pri0, audio_pri0, _, qrng_rosc0, qdss_tracedata_a, _),
>> + [13] = PINGROUP(13, gpn_tx_dis, qup_se2_l2, pwm, audio_pri3, audio_pri3, _, qrng_rosc1, qdss_tracedata_a, _),
> Same here.
>
> Regards,
> Bjorn
next prev parent reply other threads:[~2026-03-23 6:46 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-18 7:14 [PATCH v2 0/2] Introduce TLMM driver for Qualcomm IPQ5210 SoC Kathiravan Thirumoorthy
2026-03-18 7:14 ` [PATCH v2 1/2] dt-bindings: pinctrl: qcom: add IPQ5210 pinctrl Kathiravan Thirumoorthy
2026-03-18 7:14 ` [PATCH v2 2/2] pinctrl: qcom: Introduce IPQ5210 TLMM driver Kathiravan Thirumoorthy
2026-03-18 9:24 ` Konrad Dybcio
2026-03-19 2:17 ` Bjorn Andersson
2026-03-23 6:46 ` Kathiravan Thirumoorthy [this message]
2026-03-18 8:39 ` [PATCH v2 0/2] Introduce TLMM driver for Qualcomm IPQ5210 SoC Kathiravan Thirumoorthy
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=01bd44db-32b7-4195-ad66-0a608b25dca3@oss.qualcomm.com \
--to=kathiravan.thirumoorthy@oss.qualcomm.com \
--cc=andersson@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=dmitry.baryshkov@oss.qualcomm.com \
--cc=krzk+dt@kernel.org \
--cc=linusw@kernel.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-gpio@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=robh@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®