Re: [RFC PATCH 4/4] arm64: dts: st: select the Engicam RMM display pixel clock source

[Yannick FERTRE - foss <yannick.fertre@foss.st.com>]

Hi Dario,

The parent clock of ltdc must not be assigned in the DTS file.
The ltdc driver must check the display path at probe  and assign the 
parent clock based on the type of connected panel (LVDS/DSI or DPI).

Best regards


On 10/28/26 14:59, Dario Binacchi wrote:
> On STM32MP255/257 the LTDC pixel clock is selected by the SYSCFG
> pixel clock mux, whose reset value is the LVDS PHY pixel clock. With
> the RGB panel the LTDC is then clocked by the unused LVDS PHY, and every
> commit times out:
>
>    [CRTC:42:crtc-0] vblank wait timed out
>    [drm] *ERROR* flip_done timed out
>
> Select the LTDC kernel clock as pixel clock source in the RGB panel
> overlay and, for consistency, without relying on the reset value, the
> LVDS PHY pixel clock in the LVDS panel overlay.
>
> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
>
> ---
>
>   ...57d-engicam-microgea-rmm-overlay-am-1280800w8tzqw-t00h.dtso | 3 +++
>   ...2mp257d-engicam-microgea-rmm-overlay-rk050hr345-ct106a.dtso | 2 ++
>   2 files changed, 5 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/st/stm32mp257d-engicam-microgea-rmm-overlay-am-1280800w8tzqw-t00h.dtso b/arch/arm64/boot/dts/st/stm32mp257d-engicam-microgea-rmm-overlay-am-1280800w8tzqw-t00h.dtso
> index 7655c1bf56b1..b44e1d3ddb1b 100644
> --- a/arch/arm64/boot/dts/st/stm32mp257d-engicam-microgea-rmm-overlay-am-1280800w8tzqw-t00h.dtso
> +++ b/arch/arm64/boot/dts/st/stm32mp257d-engicam-microgea-rmm-overlay-am-1280800w8tzqw-t00h.dtso
> @@ -32,6 +32,9 @@ &framebuffer {
>   };
>   
>   &ltdc {
> +	/* LVDS output: the pixel clock is the LVDS PHY one */
> +	assigned-clocks = <&syscfg>;
> +	assigned-clock-parents = <&lvds>;
>   	status = "okay";
>   
>   	port {
> diff --git a/arch/arm64/boot/dts/st/stm32mp257d-engicam-microgea-rmm-overlay-rk050hr345-ct106a.dtso b/arch/arm64/boot/dts/st/stm32mp257d-engicam-microgea-rmm-overlay-rk050hr345-ct106a.dtso
> index 7be955be58ed..7855086c33c7 100644
> --- a/arch/arm64/boot/dts/st/stm32mp257d-engicam-microgea-rmm-overlay-rk050hr345-ct106a.dtso
> +++ b/arch/arm64/boot/dts/st/stm32mp257d-engicam-microgea-rmm-overlay-rk050hr345-ct106a.dtso
> @@ -38,6 +38,8 @@ touchscreen@38 {
>   &ltdc {
>   	/* RGB output: the pixel clock is the LTDC kernel clock */
>   	clocks = <&rcc CK_KER_LTDC>, <&rcc CK_BUS_LTDC>, <&syscfg>, <&lvds>;
> +	assigned-clocks = <&syscfg>;
> +	assigned-clock-parents = <&rcc CK_KER_LTDC>;
>   	pinctrl-names = "default", "sleep";
>   	pinctrl-0 = <&ltdc_pins_a>;
>   	pinctrl-1 = <&ltdc_sleep_pins_a>;