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From: "Arnd Bergmann" <arnd@arndb.de>
To: "Ramin Moussavi" <ramin.moussavi@yacoub.de>,
	"Andreas Larsson" <andreas@gaisler.com>,
	"David S . Miller" <davem@davemloft.net>
Cc: "Thomas Gleixner" <tglx@kernel.org>,
	"Peter Zijlstra" <peterz@infradead.org>,
	"Guenter Roeck" <linux@roeck-us.net>,
	sparclinux@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 4/4] sparc32: add the sparc_atomic_cmpxchg_32 system call
Date: Thu, 15 Oct 2026 11:21:32 +0200	[thread overview]
Message-ID: <026b6108-f25b-47a1-a4e0-fa7717d926d4@app.fastmail.com> (raw)
In-Reply-To: <20261015085545.3246951-5-ramin.moussavi@yacoub.de>

On Thu, Oct 15, 2026, at 10:55, Ramin Moussavi wrote:
> User space built for v8 has no compare-and-swap. C libraries emulate it
> with ldstub locks of their own, and those have two problems the kernel
> cannot see. They are not async-signal-safe: a handler that reaches an
> atomic while the code it interrupted holds the lock spins forever. And
> the kernel does not know them: FUTEX_WAKE_OP and robust futexes write
> the same words without taking those locks.

As far as I know, the baseline in sparc32 glibc has been leon3 or
sparcv9 for a long time, so CASA should always be available.

Any remaining sun4m users are on an ancient userspace with a
pre-futex glibc.

> Let user space ask the kernel instead. The call goes through
> futex_atomic_cmpxchg_inatomic(), so it agrees with whatever the futex
> code does to the same word, casa on LEON or the hashed lock otherwise,
> and a single system call cannot be interrupted by a signal halfway.
> m68k solved the same problem the same way with atomic_cmpxchg_32.

This sounds like actively regressing performance on LEON compared
to just using CASA and futex. What are you actually trying to
achieve?

> diff --git a/arch/sparc/kernel/syscalls/syscall.tbl 
> b/arch/sparc/kernel/syscalls/syscall.tbl
> index 5b9fe0e8140f..939e0130b7e2 100644
> --- a/arch/sparc/kernel/syscalls/syscall.tbl
> +++ b/arch/sparc/kernel/syscalls/syscall.tbl
> @@ -518,3 +518,4 @@
>  470	common	listns				sys_listns
>  471	common	rseq_slice_yield		sys_rseq_slice_yield
>  472	common	fchroot				sys_fchroot
> +473	32	sparc_atomic_cmpxchg_32		sys_sparc_atomic_cmpxchg_32	sys_ni_syscall

Wrong syscall number.

     Arnd

  reply	other threads:[~2026-10-15  9:22 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-15  8:55 [PATCH 0/4] sparc32: SMP fixes, futexes on SMP, and a cmpxchg " Ramin Moussavi
2026-10-15  8:55 ` [PATCH 1/4] sparc32: keep PIL raised until the IRQ frame is gone Ramin Moussavi
2026-10-15 10:48   ` Magnus Lindholm
2026-10-15 12:20   ` Andreas Larsson
2026-10-15  8:55 ` [PATCH 2/4] sparc32: wait for secondary CPUs by time, not by loop count Ramin Moussavi
2026-10-15  9:09   ` Arnd Bergmann
2026-10-15 13:43     ` Ramin Moussavi
2026-10-15  8:55 ` [PATCH 3/4] sparc32: implement futex atomics, with casa detected at run time Ramin Moussavi
2026-10-15  9:23   ` Arnd Bergmann
2026-10-15  9:28     ` John Paul Adrian Glaubitz
2026-10-15  9:45       ` Arnd Bergmann
2026-10-15  8:55 ` [PATCH 4/4] sparc32: add the sparc_atomic_cmpxchg_32 system call Ramin Moussavi
2026-10-15  9:21   ` Arnd Bergmann [this message]
2026-10-15  9:36     ` John Paul Adrian Glaubitz
2026-10-15  9:36 ` [PATCH 0/4] sparc32: SMP fixes, futexes on SMP, and a cmpxchg " Magnus Lindholm
2026-10-15 14:15   ` Ramin Moussavi

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