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From: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
To: Arnd Bergmann <arnd@arndb.de>,
	Ramin Moussavi <ramin.moussavi@yacoub.de>,
	 Andreas Larsson <andreas@gaisler.com>,
	"David S . Miller" <davem@davemloft.net>
Cc: Thomas Gleixner <tglx@kernel.org>,
	Peter Zijlstra <peterz@infradead.org>,
	 Guenter Roeck <linux@roeck-us.net>,
	sparclinux@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 4/4] sparc32: add the sparc_atomic_cmpxchg_32 system call
Date: Thu, 15 Oct 2026 11:36:43 +0200	[thread overview]
Message-ID: <8553d8909cc477ae1cb0fc1a071ffe579a8ee40a.camel@physik.fu-berlin.de> (raw)
In-Reply-To: <026b6108-f25b-47a1-a4e0-fa7717d926d4@app.fastmail.com>

On Thu, 2026-10-15 at 11:21 +0200, Arnd Bergmann wrote:
> On Thu, Oct 15, 2026, at 10:55, Ramin Moussavi wrote:
> > User space built for v8 has no compare-and-swap. C libraries emulate it
> > with ldstub locks of their own, and those have two problems the kernel
> > cannot see. They are not async-signal-safe: a handler that reaches an
> > atomic while the code it interrupted holds the lock spins forever. And
> > the kernel does not know them: FUTEX_WAKE_OP and robust futexes write
> > the same words without taking those locks.
> 
> As far as I know, the baseline in sparc32 glibc has been leon3 or
> sparcv9 for a long time, so CASA should always be available.
> 
> Any remaining sun4m users are on an ancient userspace with a
> pre-futex glibc.

There are several contributors that are trying to revive Linux on pre-Leon
32-bit SPARC machines. Recently, Magnus Lindholm made some contributions
to be able to boot a modern kernel on his old SuperSPARC workstation [1].

The changes have already been merged into Andreas' tree for linux-next [2].

Adrian

> [1] https://lore.kernel.org/all/20261007174128.959307-1-linmag7@gmail.com/
> [2] https://git.kernel.org/pub/scm/linux/kernel/git/alarsson/linux-sparc.git/log/?h=for-next

-- 
 .''`.  John Paul Adrian Glaubitz
: :' :  Debian Developer
`. `'   Physicist
  `-    GPG: 62FF 8A75 84E0 2956 9546  0006 7426 3B37 F5B5 F913

  reply	other threads:[~2026-10-15  9:36 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-15  8:55 [PATCH 0/4] sparc32: SMP fixes, futexes on SMP, and a cmpxchg " Ramin Moussavi
2026-10-15  8:55 ` [PATCH 1/4] sparc32: keep PIL raised until the IRQ frame is gone Ramin Moussavi
2026-10-15 10:48   ` Magnus Lindholm
2026-10-15 12:20   ` Andreas Larsson
2026-10-15  8:55 ` [PATCH 2/4] sparc32: wait for secondary CPUs by time, not by loop count Ramin Moussavi
2026-10-15  9:09   ` Arnd Bergmann
2026-10-15 13:43     ` Ramin Moussavi
2026-10-15  8:55 ` [PATCH 3/4] sparc32: implement futex atomics, with casa detected at run time Ramin Moussavi
2026-10-15  9:23   ` Arnd Bergmann
2026-10-15  9:28     ` John Paul Adrian Glaubitz
2026-10-15  9:45       ` Arnd Bergmann
2026-10-15  8:55 ` [PATCH 4/4] sparc32: add the sparc_atomic_cmpxchg_32 system call Ramin Moussavi
2026-10-15  9:21   ` Arnd Bergmann
2026-10-15  9:36     ` John Paul Adrian Glaubitz [this message]
2026-10-15  9:36 ` [PATCH 0/4] sparc32: SMP fixes, futexes on SMP, and a cmpxchg " Magnus Lindholm
2026-10-15 14:15   ` Ramin Moussavi

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