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From: Dinh Nguyen <dinguyen@kernel.org>
To: Krzysztof Kozlowski <krzk@kernel.org>
Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [RESEND PATCH 1/2] dt-bindings: soc: altera: Move altera.yaml from arm to soc
Date: Tue, 2 Dec 2025 15:04:30 -0600	[thread overview]
Message-ID: <054158a2-eb47-48a4-ba4c-0bcf7703e0e3@kernel.org> (raw)
In-Reply-To: <20251126-flat-fennec-of-charisma-ba8dc1@kuoka>



On 11/26/25 03:46, Krzysztof Kozlowski wrote:
> On Tue, Nov 25, 2025 at 07:40:02AM -0600, Dinh Nguyen wrote:
>> All Altera boards can hosts soft core CPUs like NIOS V or a RISC V, so
> 
> Please send it with the user of this change, so with DTS for RISC-V or
> NIOS-V.
> 
> This alone is not really correct, if all compatibles here are for ARM
> and nothing in commit msg said that any compatible is not for ARM...
> unless you claim that each of these SoCs are multi-arch?
> 

The SoCFPGA devices can house both the hardened ARM cluster running 
simultaneously with a number of soft Nios V cores in the FPGA fabric. 
They may be running independently or working together through shared 
memory or shared peripheral IO. I think that would be a qualify as a 
multi-arch device.

 From what we've seen of multi-arch use cases, there are separate DTS 
files for the soft-core CPU unit. Can you elaborate by what DTS you'd 
like to see to accomodate this change?

Thanks,
Dinh

  reply	other threads:[~2025-12-02 21:04 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-25 13:40 Dinh Nguyen
2025-11-25 13:40 ` [RESEND PATCH 2/2] dt-bindings: soc: altera: combine Intel's SoCFPGA into altera.yaml Dinh Nguyen
2025-11-26  9:49   ` Krzysztof Kozlowski
2025-12-01 12:26     ` Dinh Nguyen
2025-11-26  9:46 ` [RESEND PATCH 1/2] dt-bindings: soc: altera: Move altera.yaml from arm to soc Krzysztof Kozlowski
2025-12-02 21:04   ` Dinh Nguyen [this message]
2025-12-03  7:30     ` Krzysztof Kozlowski

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