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* [PATCH] soc: amlogic: clk-measure: Fix AXG HIFI PLL name
@ 2026-10-27  8:43 Jian Hu via B4 Relay
  2026-11-03  9:08 ` Neil Armstrong
  2026-11-03  9:53 ` Neil Armstrong
  0 siblings, 2 replies; 3+ messages in thread
From: Jian Hu via B4 Relay @ 2026-10-27  8:43 UTC (permalink / raw)
  To: Neil Armstrong, Kevin Hilman, Jerome Brunet, Martin Blumenstingl
  Cc: linux-arm-kernel, linux-amlogic, linux-kernel, Jian Hu

From: Jian Hu <jian.hu@amlogic.com>

AXG does not have a GP1 PLL. Clock measurement ID 5 corresponds
to the HIFI PLL, but it is incorrectly named "gp1_pll".

Rename it to "hifi_pll" to match the actual hardware.

Fixes: 19e0bde7bf6a ("soc: amlogic: clk-measure: add axg and g12a support")
Signed-off-by: Jian Hu <jian.hu@amlogic.com>
---
 drivers/soc/amlogic/meson-clk-measure.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/soc/amlogic/meson-clk-measure.c b/drivers/soc/amlogic/meson-clk-measure.c
index 33767f0bc67c..c1ffa2537464 100644
--- a/drivers/soc/amlogic/meson-clk-measure.c
+++ b/drivers/soc/amlogic/meson-clk-measure.c
@@ -182,7 +182,7 @@ static const struct meson_msr_id clk_msr_axg[] = {
 	CLK_MSR_ID(2, "ring_osc_out_ee_2"),
 	CLK_MSR_ID(3, "a53_ring_osc"),
 	CLK_MSR_ID(4, "gp0_pll"),
-	CLK_MSR_ID(5, "gp1_pll"),
+	CLK_MSR_ID(5, "hifi_pll"),
 	CLK_MSR_ID(7, "clk81"),
 	CLK_MSR_ID(9, "encl"),
 	CLK_MSR_ID(17, "sys_pll_div16"),

---
base-commit: a848d72aab71e19ea78180f2502ad7d12818723f
change-id: 20261027-fix_axg-9a1226dd4f1d

Best regards,
-- 
Jian Hu <jian.hu@amlogic.com>



^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2026-11-03  9:53 UTC | newest]

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2026-10-27  8:43 [PATCH] soc: amlogic: clk-measure: Fix AXG HIFI PLL name Jian Hu via B4 Relay
2026-11-03  9:08 ` Neil Armstrong
2026-11-03  9:53 ` Neil Armstrong

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