* [PATCH v3 0/4] media: qcom: iris: add support for QCS8300
@ 2025-04-23 15:39 Vikash Garodia
2025-04-23 15:39 ` [PATCH v3 1/4] dt-bindings: media: qcom,sm8550-iris: document QCS8300 IRIS accelerator Vikash Garodia
` (3 more replies)
0 siblings, 4 replies; 7+ messages in thread
From: Vikash Garodia @ 2025-04-23 15:39 UTC (permalink / raw)
To: Dikshita Agarwal, Abhinav Kumar, Bryan O'Donoghue,
Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Bjorn Andersson, Konrad Dybcio
Cc: linux-media, linux-arm-msm, devicetree, linux-kernel, Vikash Garodia
add support for video hardware acceleration on QCS8300 platform.
This series depends on
https://lore.kernel.org/all/20250417-topic-sm8x50-iris-v10-v7-1-f020cb1d0e98@linaro.org/
Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com>
---
Changes in v3:
- Fix commit description to better describe about QCS8300.
- Fix the order of the patch.
- Collect the review tags.
- Link to v2: https://lore.kernel.org/r/20250418-qcs8300_iris-v2-0-1e01385b90e9@quicinc.com
Changes in v2:
- Added dependent info in binding patch as well.
- Fix a sparse error.
- Link to v1: https://lore.kernel.org/r/20250418-qcs8300_iris-v1-0-67792b39ba21@quicinc.com
---
Vikash Garodia (4):
dt-bindings: media: qcom,sm8550-iris: document QCS8300 IRIS accelerator
media: iris: add qcs8300 platform data
arm64: dts: qcom: qcs8300: add support for video node
arm64: dts: qcom: qcs8300-ride: enable video
.../bindings/media/qcom,sm8550-iris.yaml | 1 +
arch/arm64/boot/dts/qcom/qcs8300-ride.dts | 4 +
arch/arm64/boot/dts/qcom/qcs8300.dtsi | 71 ++++++++++++
.../platform/qcom/iris/iris_platform_common.h | 1 +
.../media/platform/qcom/iris/iris_platform_gen2.c | 57 ++++++++++
.../platform/qcom/iris/iris_platform_qcs8300.h | 124 +++++++++++++++++++++
drivers/media/platform/qcom/iris/iris_probe.c | 16 ++-
7 files changed, 268 insertions(+), 6 deletions(-)
---
base-commit: 14423fc3a4a21fb436dda85450339ec2bf191b36
change-id: 20250418-qcs8300_iris-7a9ee604314a
prerequisite-change-id: 20250225-topic-sm8x50-iris-v10-a219b8a8b477:v7
prerequisite-patch-id: afffe7096c8e110a8da08c987983bc4441d39578
prerequisite-patch-id: b93c37dc7e09d1631b75387dc1ca90e3066dce17
prerequisite-patch-id: b7b50aa1657be59fd51c3e53d73382a1ee75a08e
prerequisite-patch-id: 30960743105a36f20b3ec4a9ff19e7bca04d6add
prerequisite-patch-id: 2bba98151ca103aa62a513a0fbd0df7ae64d9868
prerequisite-patch-id: 0e43a6d758b5fa5ab921c6aa3c19859e312b47d0
prerequisite-patch-id: 35f8dae1416977e88c2db7c767800c01822e266e
Best regards,
--
Vikash Garodia <quic_vgarodia@quicinc.com>
^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH v3 1/4] dt-bindings: media: qcom,sm8550-iris: document QCS8300 IRIS accelerator 2025-04-23 15:39 [PATCH v3 0/4] media: qcom: iris: add support for QCS8300 Vikash Garodia @ 2025-04-23 15:39 ` Vikash Garodia 2025-04-23 15:39 ` [PATCH v3 2/4] media: iris: add qcs8300 platform data Vikash Garodia ` (2 subsequent siblings) 3 siblings, 0 replies; 7+ messages in thread From: Vikash Garodia @ 2025-04-23 15:39 UTC (permalink / raw) To: Dikshita Agarwal, Abhinav Kumar, Bryan O'Donoghue, Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio Cc: linux-media, linux-arm-msm, devicetree, linux-kernel, Vikash Garodia Document the IRIS video decoder/encoder accelerator found in the QCS8300 platform. It belongs to same iris v3 family as that of SM8550 but is a downscaled version of SM8550. It has 2 frame processing hardware blocks while SM8550 has 4. Thereby QCS8300 have fewer capabilities than those of SM8550. Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com> --- This patch depends on patch https://lore.kernel.org/all/20250417-topic-sm8x50-iris-v10-v7-1-f020cb1d0e98@linaro.org/ --- Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml b/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml index f567f84bd60d439b151bb1407855ba73582c3b83..3dee25e99204169c6c80f7db4bad62775aaa59b5 100644 --- a/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml @@ -24,6 +24,7 @@ properties: - enum: - qcom,sm8550-iris - qcom,sm8650-iris + - qcom,qcs8300-iris power-domains: maxItems: 4 -- 2.34.1 ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v3 2/4] media: iris: add qcs8300 platform data 2025-04-23 15:39 [PATCH v3 0/4] media: qcom: iris: add support for QCS8300 Vikash Garodia 2025-04-23 15:39 ` [PATCH v3 1/4] dt-bindings: media: qcom,sm8550-iris: document QCS8300 IRIS accelerator Vikash Garodia @ 2025-04-23 15:39 ` Vikash Garodia 2025-04-23 15:46 ` Bryan O'Donoghue 2025-04-23 15:39 ` [PATCH v3 3/4] arm64: dts: qcom: qcs8300: add support for video node Vikash Garodia 2025-04-23 15:39 ` [PATCH v3 4/4] arm64: dts: qcom: qcs8300-ride: enable video Vikash Garodia 3 siblings, 1 reply; 7+ messages in thread From: Vikash Garodia @ 2025-04-23 15:39 UTC (permalink / raw) To: Dikshita Agarwal, Abhinav Kumar, Bryan O'Donoghue, Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio Cc: linux-media, linux-arm-msm, devicetree, linux-kernel, Vikash Garodia Add platform data for QCS8300, which has different capabilities compared to SM8550. Introduce a QCS8300 header that defines these capabilities and fix the order of compat strings. Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com> --- .../platform/qcom/iris/iris_platform_common.h | 1 + .../media/platform/qcom/iris/iris_platform_gen2.c | 57 ++++++++++ .../platform/qcom/iris/iris_platform_qcs8300.h | 124 +++++++++++++++++++++ drivers/media/platform/qcom/iris/iris_probe.c | 16 ++- 4 files changed, 192 insertions(+), 6 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/drivers/media/platform/qcom/iris/iris_platform_common.h index 6bc3a7975b04d612f6c89206eae95dac678695fc..3191a910653ce4bd71de9a0b4465fd583602adf6 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_common.h +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h @@ -36,6 +36,7 @@ enum pipe_type { extern struct iris_platform_data sm8250_data; extern struct iris_platform_data sm8550_data; extern struct iris_platform_data sm8650_data; +extern struct iris_platform_data qcs8300_data; enum platform_clk_type { IRIS_AXI_CLK, diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen2.c b/drivers/media/platform/qcom/iris/iris_platform_gen2.c index 5ff82296ee8ea5ad3954bd2254594048adcb8404..723e9f4cef42408168aca22b34ccd0a674a4fd25 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_gen2.c +++ b/drivers/media/platform/qcom/iris/iris_platform_gen2.c @@ -11,6 +11,7 @@ #include "iris_vpu_common.h" #include "iris_platform_sm8650.h" +#include "iris_platform_qcs8300.h" #define VIDEO_ARCH_LX 1 @@ -326,3 +327,59 @@ struct iris_platform_data sm8650_data = { .dec_op_int_buf_tbl = sm8550_dec_op_int_buf_tbl, .dec_op_int_buf_tbl_size = ARRAY_SIZE(sm8550_dec_op_int_buf_tbl), }; + +/* + * Shares most of SM8550 data except: + * - inst_caps to platform_inst_cap_qcs8300 + * - inst_fw_caps to inst_fw_cap_qcs8300 + */ +struct iris_platform_data qcs8300_data = { + .get_instance = iris_hfi_gen2_get_instance, + .init_hfi_command_ops = iris_hfi_gen2_command_ops_init, + .init_hfi_response_ops = iris_hfi_gen2_response_ops_init, + .vpu_ops = &iris_vpu3_ops, + .set_preset_registers = iris_set_sm8550_preset_registers, + .icc_tbl = sm8550_icc_table, + .icc_tbl_size = ARRAY_SIZE(sm8550_icc_table), + .clk_rst_tbl = sm8550_clk_reset_table, + .clk_rst_tbl_size = ARRAY_SIZE(sm8550_clk_reset_table), + .bw_tbl_dec = sm8550_bw_table_dec, + .bw_tbl_dec_size = ARRAY_SIZE(sm8550_bw_table_dec), + .pmdomain_tbl = sm8550_pmdomain_table, + .pmdomain_tbl_size = ARRAY_SIZE(sm8550_pmdomain_table), + .opp_pd_tbl = sm8550_opp_pd_table, + .opp_pd_tbl_size = ARRAY_SIZE(sm8550_opp_pd_table), + .clk_tbl = sm8550_clk_table, + .clk_tbl_size = ARRAY_SIZE(sm8550_clk_table), + /* Upper bound of DMA address range */ + .dma_mask = 0xe0000000 - 1, + .fwname = "qcom/vpu/vpu30_p4_s6.mbn", + .pas_id = IRIS_PAS_ID, + .inst_caps = &platform_inst_cap_qcs8300, + .inst_fw_caps = inst_fw_cap_qcs8300, + .inst_fw_caps_size = ARRAY_SIZE(inst_fw_cap_qcs8300), + .tz_cp_config_data = &tz_cp_config_sm8550, + .core_arch = VIDEO_ARCH_LX, + .hw_response_timeout = HW_RESPONSE_TIMEOUT_VALUE, + .ubwc_config = &ubwc_config_sm8550, + .num_vpp_pipe = 2, + .max_session_count = 16, + .max_core_mbpf = ((4096 * 2176) / 256) * 4, + .input_config_params = + sm8550_vdec_input_config_params, + .input_config_params_size = + ARRAY_SIZE(sm8550_vdec_input_config_params), + .output_config_params = + sm8550_vdec_output_config_params, + .output_config_params_size = + ARRAY_SIZE(sm8550_vdec_output_config_params), + .dec_input_prop = sm8550_vdec_subscribe_input_properties, + .dec_input_prop_size = ARRAY_SIZE(sm8550_vdec_subscribe_input_properties), + .dec_output_prop = sm8550_vdec_subscribe_output_properties, + .dec_output_prop_size = ARRAY_SIZE(sm8550_vdec_subscribe_output_properties), + + .dec_ip_int_buf_tbl = sm8550_dec_ip_int_buf_tbl, + .dec_ip_int_buf_tbl_size = ARRAY_SIZE(sm8550_dec_ip_int_buf_tbl), + .dec_op_int_buf_tbl = sm8550_dec_op_int_buf_tbl, + .dec_op_int_buf_tbl_size = ARRAY_SIZE(sm8550_dec_op_int_buf_tbl), +}; diff --git a/drivers/media/platform/qcom/iris/iris_platform_qcs8300.h b/drivers/media/platform/qcom/iris/iris_platform_qcs8300.h new file mode 100644 index 0000000000000000000000000000000000000000..f82355d72fcffe7e361bd30877cccb83fe9b549f --- /dev/null +++ b/drivers/media/platform/qcom/iris/iris_platform_qcs8300.h @@ -0,0 +1,124 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2022-2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +static struct platform_inst_fw_cap inst_fw_cap_qcs8300[] = { + { + .cap_id = PROFILE, + .min = V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, + .max = V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, + .step_or_mask = BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH), + .value = V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, + .hfi_id = HFI_PROP_PROFILE, + .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + .set = iris_set_u32_enum, + }, + { + .cap_id = LEVEL, + .min = V4L2_MPEG_VIDEO_H264_LEVEL_1_0, + .max = V4L2_MPEG_VIDEO_H264_LEVEL_6_2, + .step_or_mask = BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_1) | + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_2), + .value = V4L2_MPEG_VIDEO_H264_LEVEL_6_1, + .hfi_id = HFI_PROP_LEVEL, + .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + .set = iris_set_u32_enum, + }, + { + .cap_id = INPUT_BUF_HOST_MAX_COUNT, + .min = DEFAULT_MAX_HOST_BUF_COUNT, + .max = DEFAULT_MAX_HOST_BURST_BUF_COUNT, + .step_or_mask = 1, + .value = DEFAULT_MAX_HOST_BUF_COUNT, + .hfi_id = HFI_PROP_BUFFER_HOST_MAX_COUNT, + .flags = CAP_FLAG_INPUT_PORT, + .set = iris_set_u32, + }, + { + .cap_id = STAGE, + .min = STAGE_1, + .max = STAGE_2, + .step_or_mask = 1, + .value = STAGE_2, + .hfi_id = HFI_PROP_STAGE, + .set = iris_set_stage, + }, + { + .cap_id = PIPE, + .min = PIPE_1, + .max = PIPE_2, + .step_or_mask = 1, + .value = PIPE_2, + .hfi_id = HFI_PROP_PIPE, + .set = iris_set_pipe, + }, + { + .cap_id = POC, + .min = 0, + .max = 2, + .step_or_mask = 1, + .value = 1, + .hfi_id = HFI_PROP_PIC_ORDER_CNT_TYPE, + }, + { + .cap_id = CODED_FRAMES, + .min = CODED_FRAMES_PROGRESSIVE, + .max = CODED_FRAMES_PROGRESSIVE, + .step_or_mask = 0, + .value = CODED_FRAMES_PROGRESSIVE, + .hfi_id = HFI_PROP_CODED_FRAMES, + }, + { + .cap_id = BIT_DEPTH, + .min = BIT_DEPTH_8, + .max = BIT_DEPTH_8, + .step_or_mask = 1, + .value = BIT_DEPTH_8, + .hfi_id = HFI_PROP_LUMA_CHROMA_BIT_DEPTH, + }, + { + .cap_id = RAP_FRAME, + .min = 0, + .max = 1, + .step_or_mask = 1, + .value = 1, + .hfi_id = HFI_PROP_DEC_START_FROM_RAP_FRAME, + .flags = CAP_FLAG_INPUT_PORT, + .set = iris_set_u32, + }, +}; + +static struct platform_inst_caps platform_inst_cap_qcs8300 = { + .min_frame_width = 96, + .max_frame_width = 4096, + .min_frame_height = 96, + .max_frame_height = 4096, + .max_mbpf = (4096 * 2176) / 256, + .mb_cycles_vpp = 200, + .mb_cycles_fw = 326389, + .mb_cycles_fw_vpp = 44156, + .num_comv = 0, +}; diff --git a/drivers/media/platform/qcom/iris/iris_probe.c b/drivers/media/platform/qcom/iris/iris_probe.c index 7cd8650fbe9c09598670530103e3d5edf32953e7..6bc072c573e85b6d348e7d31509e8551ee0d1f16 100644 --- a/drivers/media/platform/qcom/iris/iris_probe.c +++ b/drivers/media/platform/qcom/iris/iris_probe.c @@ -335,16 +335,20 @@ static const struct dev_pm_ops iris_pm_ops = { }; static const struct of_device_id iris_dt_match[] = { +#if (!IS_ENABLED(CONFIG_VIDEO_QCOM_VENUS)) + { + .compatible = "qcom,sm8250-venus", + .data = &sm8250_data, + }, +#endif + { + .compatible = "qcom,qcs8300-iris", + .data = &qcs8300_data, + }, { .compatible = "qcom,sm8550-iris", .data = &sm8550_data, }, -#if (!IS_ENABLED(CONFIG_VIDEO_QCOM_VENUS)) - { - .compatible = "qcom,sm8250-venus", - .data = &sm8250_data, - }, -#endif { .compatible = "qcom,sm8650-iris", .data = &sm8650_data, -- 2.34.1 ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v3 2/4] media: iris: add qcs8300 platform data 2025-04-23 15:39 ` [PATCH v3 2/4] media: iris: add qcs8300 platform data Vikash Garodia @ 2025-04-23 15:46 ` Bryan O'Donoghue 2025-04-23 19:37 ` Vikash Garodia 0 siblings, 1 reply; 7+ messages in thread From: Bryan O'Donoghue @ 2025-04-23 15:46 UTC (permalink / raw) To: Vikash Garodia, Dikshita Agarwal, Abhinav Kumar, Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio Cc: linux-media, linux-arm-msm, devicetree, linux-kernel On 23/04/2025 16:39, Vikash Garodia wrote: > Add platform data for QCS8300, which has different capabilities compared > to SM8550. Introduce a QCS8300 header that defines these capabilities > and fix the order of compat strings. > > Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com> > --- > .../platform/qcom/iris/iris_platform_common.h | 1 + > .../media/platform/qcom/iris/iris_platform_gen2.c | 57 ++++++++++ > .../platform/qcom/iris/iris_platform_qcs8300.h | 124 +++++++++++++++++++++ > drivers/media/platform/qcom/iris/iris_probe.c | 16 ++- > 4 files changed, 192 insertions(+), 6 deletions(-) > > diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/drivers/media/platform/qcom/iris/iris_platform_common.h > index 6bc3a7975b04d612f6c89206eae95dac678695fc..3191a910653ce4bd71de9a0b4465fd583602adf6 100644 > --- a/drivers/media/platform/qcom/iris/iris_platform_common.h > +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h > @@ -36,6 +36,7 @@ enum pipe_type { > extern struct iris_platform_data sm8250_data; > extern struct iris_platform_data sm8550_data; > extern struct iris_platform_data sm8650_data; > +extern struct iris_platform_data qcs8300_data; > > enum platform_clk_type { > IRIS_AXI_CLK, > diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen2.c b/drivers/media/platform/qcom/iris/iris_platform_gen2.c > index 5ff82296ee8ea5ad3954bd2254594048adcb8404..723e9f4cef42408168aca22b34ccd0a674a4fd25 100644 > --- a/drivers/media/platform/qcom/iris/iris_platform_gen2.c > +++ b/drivers/media/platform/qcom/iris/iris_platform_gen2.c > @@ -11,6 +11,7 @@ > #include "iris_vpu_common.h" > > #include "iris_platform_sm8650.h" > +#include "iris_platform_qcs8300.h" This is out of order, reviewing the header I don't believe there's any dependency in qcs8300.h on sm8650.h that justifies. qcs8300.h sm8650.h > > #define VIDEO_ARCH_LX 1 > > @@ -326,3 +327,59 @@ struct iris_platform_data sm8650_data = { > .dec_op_int_buf_tbl = sm8550_dec_op_int_buf_tbl, > .dec_op_int_buf_tbl_size = ARRAY_SIZE(sm8550_dec_op_int_buf_tbl), > }; > + > +/* > + * Shares most of SM8550 data except: > + * - inst_caps to platform_inst_cap_qcs8300 > + * - inst_fw_caps to inst_fw_cap_qcs8300 > + */ > +struct iris_platform_data qcs8300_data = { > + .get_instance = iris_hfi_gen2_get_instance, > + .init_hfi_command_ops = iris_hfi_gen2_command_ops_init, > + .init_hfi_response_ops = iris_hfi_gen2_response_ops_init, > + .vpu_ops = &iris_vpu3_ops, > + .set_preset_registers = iris_set_sm8550_preset_registers, > + .icc_tbl = sm8550_icc_table, > + .icc_tbl_size = ARRAY_SIZE(sm8550_icc_table), > + .clk_rst_tbl = sm8550_clk_reset_table, > + .clk_rst_tbl_size = ARRAY_SIZE(sm8550_clk_reset_table), > + .bw_tbl_dec = sm8550_bw_table_dec, > + .bw_tbl_dec_size = ARRAY_SIZE(sm8550_bw_table_dec), > + .pmdomain_tbl = sm8550_pmdomain_table, > + .pmdomain_tbl_size = ARRAY_SIZE(sm8550_pmdomain_table), > + .opp_pd_tbl = sm8550_opp_pd_table, > + .opp_pd_tbl_size = ARRAY_SIZE(sm8550_opp_pd_table), > + .clk_tbl = sm8550_clk_table, > + .clk_tbl_size = ARRAY_SIZE(sm8550_clk_table), > + /* Upper bound of DMA address range */ > + .dma_mask = 0xe0000000 - 1, > + .fwname = "qcom/vpu/vpu30_p4_s6.mbn", > + .pas_id = IRIS_PAS_ID, > + .inst_caps = &platform_inst_cap_qcs8300, > + .inst_fw_caps = inst_fw_cap_qcs8300, > + .inst_fw_caps_size = ARRAY_SIZE(inst_fw_cap_qcs8300), > + .tz_cp_config_data = &tz_cp_config_sm8550, > + .core_arch = VIDEO_ARCH_LX, > + .hw_response_timeout = HW_RESPONSE_TIMEOUT_VALUE, > + .ubwc_config = &ubwc_config_sm8550, > + .num_vpp_pipe = 2, > + .max_session_count = 16, > + .max_core_mbpf = ((4096 * 2176) / 256) * 4, > + .input_config_params = > + sm8550_vdec_input_config_params, > + .input_config_params_size = > + ARRAY_SIZE(sm8550_vdec_input_config_params), > + .output_config_params = > + sm8550_vdec_output_config_params, > + .output_config_params_size = > + ARRAY_SIZE(sm8550_vdec_output_config_params), > + .dec_input_prop = sm8550_vdec_subscribe_input_properties, > + .dec_input_prop_size = ARRAY_SIZE(sm8550_vdec_subscribe_input_properties), > + .dec_output_prop = sm8550_vdec_subscribe_output_properties, > + .dec_output_prop_size = ARRAY_SIZE(sm8550_vdec_subscribe_output_properties), > + > + .dec_ip_int_buf_tbl = sm8550_dec_ip_int_buf_tbl, > + .dec_ip_int_buf_tbl_size = ARRAY_SIZE(sm8550_dec_ip_int_buf_tbl), > + .dec_op_int_buf_tbl = sm8550_dec_op_int_buf_tbl, > + .dec_op_int_buf_tbl_size = ARRAY_SIZE(sm8550_dec_op_int_buf_tbl), > +}; > diff --git a/drivers/media/platform/qcom/iris/iris_platform_qcs8300.h b/drivers/media/platform/qcom/iris/iris_platform_qcs8300.h > new file mode 100644 > index 0000000000000000000000000000000000000000..f82355d72fcffe7e361bd30877cccb83fe9b549f > --- /dev/null > +++ b/drivers/media/platform/qcom/iris/iris_platform_qcs8300.h > @@ -0,0 +1,124 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +/* > + * Copyright (c) 2022-2025 Qualcomm Innovation Center, Inc. All rights reserved. > + */ > + > +static struct platform_inst_fw_cap inst_fw_cap_qcs8300[] = { > + { > + .cap_id = PROFILE, > + .min = V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, > + .max = V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, > + .step_or_mask = BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | > + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) | > + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | > + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | > + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH), > + .value = V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, > + .hfi_id = HFI_PROP_PROFILE, > + .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, > + .set = iris_set_u32_enum, > + }, > + { > + .cap_id = LEVEL, > + .min = V4L2_MPEG_VIDEO_H264_LEVEL_1_0, > + .max = V4L2_MPEG_VIDEO_H264_LEVEL_6_2, > + .step_or_mask = BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | > + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | > + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | > + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | > + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | > + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | > + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | > + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | > + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | > + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | > + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | > + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | > + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | > + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | > + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | > + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | > + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | > + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0) | > + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_1) | > + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_2), > + .value = V4L2_MPEG_VIDEO_H264_LEVEL_6_1, > + .hfi_id = HFI_PROP_LEVEL, > + .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, > + .set = iris_set_u32_enum, > + }, > + { > + .cap_id = INPUT_BUF_HOST_MAX_COUNT, > + .min = DEFAULT_MAX_HOST_BUF_COUNT, > + .max = DEFAULT_MAX_HOST_BURST_BUF_COUNT, > + .step_or_mask = 1, > + .value = DEFAULT_MAX_HOST_BUF_COUNT, > + .hfi_id = HFI_PROP_BUFFER_HOST_MAX_COUNT, > + .flags = CAP_FLAG_INPUT_PORT, > + .set = iris_set_u32, > + }, > + { > + .cap_id = STAGE, > + .min = STAGE_1, > + .max = STAGE_2, > + .step_or_mask = 1, > + .value = STAGE_2, > + .hfi_id = HFI_PROP_STAGE, > + .set = iris_set_stage, > + }, > + { > + .cap_id = PIPE, > + .min = PIPE_1, > + .max = PIPE_2, > + .step_or_mask = 1, > + .value = PIPE_2, > + .hfi_id = HFI_PROP_PIPE, > + .set = iris_set_pipe, > + }, > + { > + .cap_id = POC, > + .min = 0, > + .max = 2, > + .step_or_mask = 1, > + .value = 1, > + .hfi_id = HFI_PROP_PIC_ORDER_CNT_TYPE, > + }, > + { > + .cap_id = CODED_FRAMES, > + .min = CODED_FRAMES_PROGRESSIVE, > + .max = CODED_FRAMES_PROGRESSIVE, > + .step_or_mask = 0, > + .value = CODED_FRAMES_PROGRESSIVE, > + .hfi_id = HFI_PROP_CODED_FRAMES, > + }, > + { > + .cap_id = BIT_DEPTH, > + .min = BIT_DEPTH_8, > + .max = BIT_DEPTH_8, > + .step_or_mask = 1, > + .value = BIT_DEPTH_8, > + .hfi_id = HFI_PROP_LUMA_CHROMA_BIT_DEPTH, > + }, > + { > + .cap_id = RAP_FRAME, > + .min = 0, > + .max = 1, > + .step_or_mask = 1, > + .value = 1, > + .hfi_id = HFI_PROP_DEC_START_FROM_RAP_FRAME, > + .flags = CAP_FLAG_INPUT_PORT, > + .set = iris_set_u32, > + }, > +}; > + > +static struct platform_inst_caps platform_inst_cap_qcs8300 = { > + .min_frame_width = 96, > + .max_frame_width = 4096, > + .min_frame_height = 96, > + .max_frame_height = 4096, > + .max_mbpf = (4096 * 2176) / 256, > + .mb_cycles_vpp = 200, > + .mb_cycles_fw = 326389, > + .mb_cycles_fw_vpp = 44156, > + .num_comv = 0, > +}; > diff --git a/drivers/media/platform/qcom/iris/iris_probe.c b/drivers/media/platform/qcom/iris/iris_probe.c > index 7cd8650fbe9c09598670530103e3d5edf32953e7..6bc072c573e85b6d348e7d31509e8551ee0d1f16 100644 > --- a/drivers/media/platform/qcom/iris/iris_probe.c > +++ b/drivers/media/platform/qcom/iris/iris_probe.c > @@ -335,16 +335,20 @@ static const struct dev_pm_ops iris_pm_ops = { > }; > > static const struct of_device_id iris_dt_match[] = { > +#if (!IS_ENABLED(CONFIG_VIDEO_QCOM_VENUS)) > + { > + .compatible = "qcom,sm8250-venus", > + .data = &sm8250_data, > + }, > +#endif > + { > + .compatible = "qcom,qcs8300-iris", > + .data = &qcs8300_data, > + }, same comment q should come before s in our ordered lists. > { > .compatible = "qcom,sm8550-iris", > .data = &sm8550_data, > }, > -#if (!IS_ENABLED(CONFIG_VIDEO_QCOM_VENUS)) > - { > - .compatible = "qcom,sm8250-venus", > - .data = &sm8250_data, > - }, > -#endif This part is right but should probably be a separate patch fixing the existing ordering. > { > .compatible = "qcom,sm8650-iris", > .data = &sm8650_data, > ---bod ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v3 2/4] media: iris: add qcs8300 platform data 2025-04-23 15:46 ` Bryan O'Donoghue @ 2025-04-23 19:37 ` Vikash Garodia 0 siblings, 0 replies; 7+ messages in thread From: Vikash Garodia @ 2025-04-23 19:37 UTC (permalink / raw) To: Bryan O'Donoghue, Dikshita Agarwal, Abhinav Kumar, Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio Cc: linux-media, linux-arm-msm, devicetree, linux-kernel On 4/23/2025 9:16 PM, Bryan O'Donoghue wrote: > On 23/04/2025 16:39, Vikash Garodia wrote: >> Add platform data for QCS8300, which has different capabilities compared >> to SM8550. Introduce a QCS8300 header that defines these capabilities >> and fix the order of compat strings. >> >> Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com> >> --- >> .../platform/qcom/iris/iris_platform_common.h | 1 + >> .../media/platform/qcom/iris/iris_platform_gen2.c | 57 ++++++++++ >> .../platform/qcom/iris/iris_platform_qcs8300.h | 124 +++++++++++++++++++++ >> drivers/media/platform/qcom/iris/iris_probe.c | 16 ++- >> 4 files changed, 192 insertions(+), 6 deletions(-) >> >> diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h >> b/drivers/media/platform/qcom/iris/iris_platform_common.h >> index >> 6bc3a7975b04d612f6c89206eae95dac678695fc..3191a910653ce4bd71de9a0b4465fd583602adf6 100644 >> --- a/drivers/media/platform/qcom/iris/iris_platform_common.h >> +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h >> @@ -36,6 +36,7 @@ enum pipe_type { >> extern struct iris_platform_data sm8250_data; >> extern struct iris_platform_data sm8550_data; >> extern struct iris_platform_data sm8650_data; >> +extern struct iris_platform_data qcs8300_data; >> enum platform_clk_type { >> IRIS_AXI_CLK, >> diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen2.c >> b/drivers/media/platform/qcom/iris/iris_platform_gen2.c >> index >> 5ff82296ee8ea5ad3954bd2254594048adcb8404..723e9f4cef42408168aca22b34ccd0a674a4fd25 100644 >> --- a/drivers/media/platform/qcom/iris/iris_platform_gen2.c >> +++ b/drivers/media/platform/qcom/iris/iris_platform_gen2.c >> @@ -11,6 +11,7 @@ >> #include "iris_vpu_common.h" >> #include "iris_platform_sm8650.h" >> +#include "iris_platform_qcs8300.h" > > This is out of order, reviewing the header I don't believe there's any > dependency in qcs8300.h on sm8650.h that justifies. > > qcs8300.h > sm8650.h No dependency, fixed in v4. > > >> #define VIDEO_ARCH_LX 1 >> @@ -326,3 +327,59 @@ struct iris_platform_data sm8650_data = { >> .dec_op_int_buf_tbl = sm8550_dec_op_int_buf_tbl, >> .dec_op_int_buf_tbl_size = ARRAY_SIZE(sm8550_dec_op_int_buf_tbl), >> }; >> + >> +/* >> + * Shares most of SM8550 data except: >> + * - inst_caps to platform_inst_cap_qcs8300 >> + * - inst_fw_caps to inst_fw_cap_qcs8300 >> + */ >> +struct iris_platform_data qcs8300_data = { >> + .get_instance = iris_hfi_gen2_get_instance, >> + .init_hfi_command_ops = iris_hfi_gen2_command_ops_init, >> + .init_hfi_response_ops = iris_hfi_gen2_response_ops_init, >> + .vpu_ops = &iris_vpu3_ops, >> + .set_preset_registers = iris_set_sm8550_preset_registers, >> + .icc_tbl = sm8550_icc_table, >> + .icc_tbl_size = ARRAY_SIZE(sm8550_icc_table), >> + .clk_rst_tbl = sm8550_clk_reset_table, >> + .clk_rst_tbl_size = ARRAY_SIZE(sm8550_clk_reset_table), >> + .bw_tbl_dec = sm8550_bw_table_dec, >> + .bw_tbl_dec_size = ARRAY_SIZE(sm8550_bw_table_dec), >> + .pmdomain_tbl = sm8550_pmdomain_table, >> + .pmdomain_tbl_size = ARRAY_SIZE(sm8550_pmdomain_table), >> + .opp_pd_tbl = sm8550_opp_pd_table, >> + .opp_pd_tbl_size = ARRAY_SIZE(sm8550_opp_pd_table), >> + .clk_tbl = sm8550_clk_table, >> + .clk_tbl_size = ARRAY_SIZE(sm8550_clk_table), >> + /* Upper bound of DMA address range */ >> + .dma_mask = 0xe0000000 - 1, >> + .fwname = "qcom/vpu/vpu30_p4_s6.mbn", >> + .pas_id = IRIS_PAS_ID, >> + .inst_caps = &platform_inst_cap_qcs8300, >> + .inst_fw_caps = inst_fw_cap_qcs8300, >> + .inst_fw_caps_size = ARRAY_SIZE(inst_fw_cap_qcs8300), >> + .tz_cp_config_data = &tz_cp_config_sm8550, >> + .core_arch = VIDEO_ARCH_LX, >> + .hw_response_timeout = HW_RESPONSE_TIMEOUT_VALUE, >> + .ubwc_config = &ubwc_config_sm8550, >> + .num_vpp_pipe = 2, >> + .max_session_count = 16, >> + .max_core_mbpf = ((4096 * 2176) / 256) * 4, >> + .input_config_params = >> + sm8550_vdec_input_config_params, >> + .input_config_params_size = >> + ARRAY_SIZE(sm8550_vdec_input_config_params), >> + .output_config_params = >> + sm8550_vdec_output_config_params, >> + .output_config_params_size = >> + ARRAY_SIZE(sm8550_vdec_output_config_params), >> + .dec_input_prop = sm8550_vdec_subscribe_input_properties, >> + .dec_input_prop_size = ARRAY_SIZE(sm8550_vdec_subscribe_input_properties), >> + .dec_output_prop = sm8550_vdec_subscribe_output_properties, >> + .dec_output_prop_size = ARRAY_SIZE(sm8550_vdec_subscribe_output_properties), >> + >> + .dec_ip_int_buf_tbl = sm8550_dec_ip_int_buf_tbl, >> + .dec_ip_int_buf_tbl_size = ARRAY_SIZE(sm8550_dec_ip_int_buf_tbl), >> + .dec_op_int_buf_tbl = sm8550_dec_op_int_buf_tbl, >> + .dec_op_int_buf_tbl_size = ARRAY_SIZE(sm8550_dec_op_int_buf_tbl), >> +}; >> diff --git a/drivers/media/platform/qcom/iris/iris_platform_qcs8300.h >> b/drivers/media/platform/qcom/iris/iris_platform_qcs8300.h >> new file mode 100644 >> index >> 0000000000000000000000000000000000000000..f82355d72fcffe7e361bd30877cccb83fe9b549f >> --- /dev/null >> +++ b/drivers/media/platform/qcom/iris/iris_platform_qcs8300.h >> @@ -0,0 +1,124 @@ >> +/* SPDX-License-Identifier: GPL-2.0-only */ >> +/* >> + * Copyright (c) 2022-2025 Qualcomm Innovation Center, Inc. All rights reserved. >> + */ >> + >> +static struct platform_inst_fw_cap inst_fw_cap_qcs8300[] = { >> + { >> + .cap_id = PROFILE, >> + .min = V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, >> + .max = V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, >> + .step_or_mask = BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | >> + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) | >> + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | >> + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | >> + BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH), >> + .value = V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, >> + .hfi_id = HFI_PROP_PROFILE, >> + .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, >> + .set = iris_set_u32_enum, >> + }, >> + { >> + .cap_id = LEVEL, >> + .min = V4L2_MPEG_VIDEO_H264_LEVEL_1_0, >> + .max = V4L2_MPEG_VIDEO_H264_LEVEL_6_2, >> + .step_or_mask = BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | >> + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | >> + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | >> + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | >> + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | >> + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | >> + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | >> + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | >> + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | >> + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | >> + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | >> + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | >> + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | >> + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | >> + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | >> + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | >> + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | >> + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0) | >> + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_1) | >> + BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_2), >> + .value = V4L2_MPEG_VIDEO_H264_LEVEL_6_1, >> + .hfi_id = HFI_PROP_LEVEL, >> + .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, >> + .set = iris_set_u32_enum, >> + }, >> + { >> + .cap_id = INPUT_BUF_HOST_MAX_COUNT, >> + .min = DEFAULT_MAX_HOST_BUF_COUNT, >> + .max = DEFAULT_MAX_HOST_BURST_BUF_COUNT, >> + .step_or_mask = 1, >> + .value = DEFAULT_MAX_HOST_BUF_COUNT, >> + .hfi_id = HFI_PROP_BUFFER_HOST_MAX_COUNT, >> + .flags = CAP_FLAG_INPUT_PORT, >> + .set = iris_set_u32, >> + }, >> + { >> + .cap_id = STAGE, >> + .min = STAGE_1, >> + .max = STAGE_2, >> + .step_or_mask = 1, >> + .value = STAGE_2, >> + .hfi_id = HFI_PROP_STAGE, >> + .set = iris_set_stage, >> + }, >> + { >> + .cap_id = PIPE, >> + .min = PIPE_1, >> + .max = PIPE_2, >> + .step_or_mask = 1, >> + .value = PIPE_2, >> + .hfi_id = HFI_PROP_PIPE, >> + .set = iris_set_pipe, >> + }, >> + { >> + .cap_id = POC, >> + .min = 0, >> + .max = 2, >> + .step_or_mask = 1, >> + .value = 1, >> + .hfi_id = HFI_PROP_PIC_ORDER_CNT_TYPE, >> + }, >> + { >> + .cap_id = CODED_FRAMES, >> + .min = CODED_FRAMES_PROGRESSIVE, >> + .max = CODED_FRAMES_PROGRESSIVE, >> + .step_or_mask = 0, >> + .value = CODED_FRAMES_PROGRESSIVE, >> + .hfi_id = HFI_PROP_CODED_FRAMES, >> + }, >> + { >> + .cap_id = BIT_DEPTH, >> + .min = BIT_DEPTH_8, >> + .max = BIT_DEPTH_8, >> + .step_or_mask = 1, >> + .value = BIT_DEPTH_8, >> + .hfi_id = HFI_PROP_LUMA_CHROMA_BIT_DEPTH, >> + }, >> + { >> + .cap_id = RAP_FRAME, >> + .min = 0, >> + .max = 1, >> + .step_or_mask = 1, >> + .value = 1, >> + .hfi_id = HFI_PROP_DEC_START_FROM_RAP_FRAME, >> + .flags = CAP_FLAG_INPUT_PORT, >> + .set = iris_set_u32, >> + }, >> +}; >> + >> +static struct platform_inst_caps platform_inst_cap_qcs8300 = { >> + .min_frame_width = 96, >> + .max_frame_width = 4096, >> + .min_frame_height = 96, >> + .max_frame_height = 4096, >> + .max_mbpf = (4096 * 2176) / 256, >> + .mb_cycles_vpp = 200, >> + .mb_cycles_fw = 326389, >> + .mb_cycles_fw_vpp = 44156, >> + .num_comv = 0, >> +}; >> diff --git a/drivers/media/platform/qcom/iris/iris_probe.c >> b/drivers/media/platform/qcom/iris/iris_probe.c >> index >> 7cd8650fbe9c09598670530103e3d5edf32953e7..6bc072c573e85b6d348e7d31509e8551ee0d1f16 100644 >> --- a/drivers/media/platform/qcom/iris/iris_probe.c >> +++ b/drivers/media/platform/qcom/iris/iris_probe.c >> @@ -335,16 +335,20 @@ static const struct dev_pm_ops iris_pm_ops = { >> }; >> static const struct of_device_id iris_dt_match[] = { >> +#if (!IS_ENABLED(CONFIG_VIDEO_QCOM_VENUS)) >> + { >> + .compatible = "qcom,sm8250-venus", >> + .data = &sm8250_data, >> + }, >> +#endif >> + { >> + .compatible = "qcom,qcs8300-iris", >> + .data = &qcs8300_data, >> + }, > > same comment q should come before s in our ordered lists. fixed in v4. > >> { >> .compatible = "qcom,sm8550-iris", >> .data = &sm8550_data, >> }, >> -#if (!IS_ENABLED(CONFIG_VIDEO_QCOM_VENUS)) >> - { >> - .compatible = "qcom,sm8250-venus", >> - .data = &sm8250_data, >> - }, >> -#endif > > This part is right but should probably be a separate patch fixing the existing > ordering. Ok, added as a new patch to fix existing order in v4. Regards, Vikash > >> { >> .compatible = "qcom,sm8650-iris", >> .data = &sm8650_data, >> > ---bod ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v3 3/4] arm64: dts: qcom: qcs8300: add support for video node 2025-04-23 15:39 [PATCH v3 0/4] media: qcom: iris: add support for QCS8300 Vikash Garodia 2025-04-23 15:39 ` [PATCH v3 1/4] dt-bindings: media: qcom,sm8550-iris: document QCS8300 IRIS accelerator Vikash Garodia 2025-04-23 15:39 ` [PATCH v3 2/4] media: iris: add qcs8300 platform data Vikash Garodia @ 2025-04-23 15:39 ` Vikash Garodia 2025-04-23 15:39 ` [PATCH v3 4/4] arm64: dts: qcom: qcs8300-ride: enable video Vikash Garodia 3 siblings, 0 replies; 7+ messages in thread From: Vikash Garodia @ 2025-04-23 15:39 UTC (permalink / raw) To: Dikshita Agarwal, Abhinav Kumar, Bryan O'Donoghue, Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio Cc: linux-media, linux-arm-msm, devicetree, linux-kernel, Vikash Garodia Add the IRIS video-codec node on QCS8300. Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com> --- arch/arm64/boot/dts/qcom/qcs8300.dtsi | 71 +++++++++++++++++++++++++++++++++++ 1 file changed, 71 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi b/arch/arm64/boot/dts/qcom/qcs8300.dtsi index 4a057f7c0d9fae0ebd1b3cf3468746b382bc886b..158779434f610b10ea82d2cdae08090a7a4402de 100644 --- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi @@ -2929,6 +2929,77 @@ usb_2_dwc3: usb@a400000 { }; }; + iris: video-codec@aa00000 { + compatible = "qcom,qcs8300-iris"; + + reg = <0x0 0x0aa00000 0x0 0xf0000>; + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; + + power-domains = <&videocc VIDEO_CC_MVS0C_GDSC>, + <&videocc VIDEO_CC_MVS0_GDSC>, + <&rpmhpd RPMHPD_MX>, + <&rpmhpd RPMHPD_MMCX>; + power-domain-names = "venus", + "vcodec0", + "mxc", + "mmcx"; + + operating-points-v2 = <&iris_opp_table>; + + clocks = <&gcc GCC_VIDEO_AXI0_CLK>, + <&videocc VIDEO_CC_MVS0C_CLK>, + <&videocc VIDEO_CC_MVS0_CLK>; + clock-names = "iface", + "core", + "vcodec0_core"; + + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ACTIVE_ONLY>, + <&mmss_noc MASTER_VIDEO_P0 QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; + interconnect-names = "cpu-cfg", + "video-mem"; + + memory-region = <&video_mem>; + + resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>; + reset-names = "bus"; + + iommus = <&apps_smmu 0x0880 0x0400>, + <&apps_smmu 0x0887 0x0400>; + dma-coherent; + + status = "disabled"; + + iris_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-366000000 { + opp-hz = /bits/ 64 <366000000>; + required-opps = <&rpmhpd_opp_svs_l1>, + <&rpmhpd_opp_svs_l1>; + }; + + opp-444000000 { + opp-hz = /bits/ 64 <444000000>; + required-opps = <&rpmhpd_opp_nom>, + <&rpmhpd_opp_nom>; + }; + + opp-533333334 { + opp-hz = /bits/ 64 <533333334>; + required-opps = <&rpmhpd_opp_turbo>, + <&rpmhpd_opp_turbo>; + }; + + opp-560000000 { + opp-hz = /bits/ 64 <560000000>; + required-opps = <&rpmhpd_opp_turbo_l1>, + <&rpmhpd_opp_turbo_l1>; + }; + }; + }; + videocc: clock-controller@abf0000 { compatible = "qcom,qcs8300-videocc"; reg = <0x0 0x0abf0000 0x0 0x10000>; -- 2.34.1 ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v3 4/4] arm64: dts: qcom: qcs8300-ride: enable video 2025-04-23 15:39 [PATCH v3 0/4] media: qcom: iris: add support for QCS8300 Vikash Garodia ` (2 preceding siblings ...) 2025-04-23 15:39 ` [PATCH v3 3/4] arm64: dts: qcom: qcs8300: add support for video node Vikash Garodia @ 2025-04-23 15:39 ` Vikash Garodia 3 siblings, 0 replies; 7+ messages in thread From: Vikash Garodia @ 2025-04-23 15:39 UTC (permalink / raw) To: Dikshita Agarwal, Abhinav Kumar, Bryan O'Donoghue, Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio Cc: linux-media, linux-arm-msm, devicetree, linux-kernel, Vikash Garodia Enable video nodes on the qcs8300-ride board. Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com> --- arch/arm64/boot/dts/qcom/qcs8300-ride.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts b/arch/arm64/boot/dts/qcom/qcs8300-ride.dts index b5c9f89b34356bbf8387643e8702a2a5f50b332f..87114a349fedd80296abaf3d2f5f284b5adbbdfe 100644 --- a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts +++ b/arch/arm64/boot/dts/qcom/qcs8300-ride.dts @@ -285,6 +285,10 @@ queue3 { }; }; +&iris { + status = "okay"; +}; + &qupv3_id_0 { status = "okay"; }; -- 2.34.1 ^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2025-04-23 19:37 UTC | newest] Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2025-04-23 15:39 [PATCH v3 0/4] media: qcom: iris: add support for QCS8300 Vikash Garodia 2025-04-23 15:39 ` [PATCH v3 1/4] dt-bindings: media: qcom,sm8550-iris: document QCS8300 IRIS accelerator Vikash Garodia 2025-04-23 15:39 ` [PATCH v3 2/4] media: iris: add qcs8300 platform data Vikash Garodia 2025-04-23 15:46 ` Bryan O'Donoghue 2025-04-23 19:37 ` Vikash Garodia 2025-04-23 15:39 ` [PATCH v3 3/4] arm64: dts: qcom: qcs8300: add support for video node Vikash Garodia 2025-04-23 15:39 ` [PATCH v3 4/4] arm64: dts: qcom: qcs8300-ride: enable video Vikash Garodia
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