From: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com>
To: "Daniel Lezcano" <daniel.lezcano@oss.qualcomm.com>,
"Jonathan Cameron" <jic23@kernel.org>,
"David Lechner" <dlechner@baylibre.com>,
"Nuno Sá" <nuno.sa@analog.com>,
"Andy Shevchenko" <andy@kernel.org>,
"Amit Kucheria" <amitk@kernel.org>,
"Thara Gopinath" <thara.gopinath@gmail.com>,
"Rafael J. Wysocki" <rafael@kernel.org>,
"Daniel Lezcano" <daniel.lezcano@kernel.org>,
"Zhang Rui" <rui.zhang@intel.com>,
"Lukasz Luba" <lukasz.luba@arm.com>,
"Andy Shevchenko" <andriy.shevchenko@intel.com>
Cc: linux-arm-msm@vger.kernel.org, linux-iio@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
Kamal Wadhwa <kamal.wadhwa@oss.qualcomm.com>,
David Collins <david.collins@oss.qualcomm.com>,
Anjelique Melendez <anjelique.melendez@oss.qualcomm.com>,
Neil Armstrong <neil.armstrong@linaro.org>,
Stephan Gerhold <stephan.gerhold@linaro.org>,
Andy Shevchenko <andriy.shevchenko@intel.com>
Subject: Re: [PATCH v4 3/3] thermal: qcom: add support for PMIC5 Gen3 ADC thermal monitoring
Date: Wed, 5 Aug 2026 16:17:14 +0530 [thread overview]
Message-ID: <06c37244-d589-4867-a189-efdb300bbce1@oss.qualcomm.com> (raw)
In-Reply-To: <a68078d9-9b80-48af-808c-af24d97268c0@oss.qualcomm.com>
On 7/27/2026 9:13 PM, Daniel Lezcano wrote:
>
> Hi,
>
> Andy ? Are fine with these changes ?
>
Hi Andy,
I have addressed all your V3 comments in this V4 patch.
Can you please check and confirm if it looks fine to you ?
Thanks,
Jishnu
>
>
> On 7/22/26 13:26, Jishnu Prakash wrote:
>> Add support for ADC_TM part of PMIC5 Gen3 in an auxiliary driver
>> under the Gen3 ADC driver. Its functionality is similar to that of
>> PMIC5 Gen2 ADC_TM, which implements the threshold setting and
>> interrupt generating functions, used to support thermal trip points.
>>
>> In Gen3 ADC, the register interface is implemented on one or more SDAM
>> (Shared Direct Access Memory) peripherals instead of dedicated ADC
>> peripherals. Each ADC SDAM has eight channels which can be configured
>> for either immediate reads (main ADC driver's functionality) or ADC_TM
>> reads. By convention, the first channel of the first ADC SDAM is reserved
>> for all immediate reads and remaining channels across all SDAMs are used
>> for ADC_TM functionality.
>>
>> On the first SDAM, the interrupt line and configuration registers are
>> shared between the main ADC and auxiliary ADC_TM drivers. Access to the
>> registers is protected through a mutex shared between the drivers. The
>> ADC_TM driver accesses this mutex and some other functions shared from
>> the main driver (like adc5_gen3_get_scaled_reading() for immediate channel
>> reads in the .get_temp() callback) through APIs exported into a shared
>> namespace.
>>
>> Signed-off-by: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com>
>> ---
>> drivers/thermal/qcom/Kconfig | 9 +
>> drivers/thermal/qcom/Makefile | 1 +
>> drivers/thermal/qcom/qcom-spmi-adc-tm5-gen3.c | 434 ++++++++++++++++++++++++++
>> 3 files changed, 444 insertions(+)
>>
next prev parent reply other threads:[~2026-08-05 10:47 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-22 11:26 [PATCH v4 0/3] " Jishnu Prakash
2026-07-22 11:26 ` [PATCH v4 1/3] iio: adc: qcom-spmi-adc5-gen3: Remove an unnecessary print Jishnu Prakash
2026-07-22 11:26 ` [PATCH v4 2/3] iio: adc: qcom-spmi-adc5-gen3: Share SDAM0 IRQ with ADC_TM auxiliary driver Jishnu Prakash
2026-07-22 11:26 ` [PATCH v4 3/3] thermal: qcom: add support for PMIC5 Gen3 ADC thermal monitoring Jishnu Prakash
2026-07-27 15:43 ` Daniel Lezcano
2026-08-05 10:47 ` Jishnu Prakash [this message]
2026-08-06 20:37 ` Andy Shevchenko
2026-08-07 12:01 ` Daniel Lezcano
2026-08-07 12:06 ` [PATCH v4 0/3] " Daniel Lezcano
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