* [PATCH] arm64: dts: qcom: glymur: Fix fastrpc compute-cb reg values for cdsp
@ 2026-09-22 6:40 Ekansh Gupta
2026-09-22 7:05 ` Abel Vesa
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Ekansh Gupta @ 2026-09-22 6:40 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Abel Vesa, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Sibi Sankar
Cc: Bharath Kumar, Chenna Kesava Raju, Konrad Dybcio, linux-arm-msm,
devicetree, linux-kernel, Mahima Bhattaram, Ekansh Gupta
The reg value of a compute-cb node must match the SID (the lower
nibble of its IOMMU stream ID) it is associated with. In the cdsp
fastrpc node, compute-cb@10, compute-cb@11 and compute-cb@12 were
mistakenly given reg values of 10, 11 and 12 instead of 12, 13 and
14, which don't match their SIDs and leads to SMMU translation errors.
Fix the reg values, and rename the nodes accordingly.
Fixes: cd1d174c75f7 ("arm64: dts: qcom: glymur: Add ADSP and CDSP for Glymur SoC")
Co-developed-by: Mahima Bhattaram <mbhattar@qti.qualcomm.com>
Signed-off-by: Mahima Bhattaram <mbhattar@qti.qualcomm.com>
Signed-off-by: Ekansh Gupta <ekansh.gupta@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/glymur.dtsi | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi
index de7c395d9c35..51fea666efac 100644
--- a/arch/arm64/boot/dts/qcom/glymur.dtsi
+++ b/arch/arm64/boot/dts/qcom/glymur.dtsi
@@ -8471,9 +8471,9 @@ compute-cb@8 {
/* note: compute-cb@9 is secure */
- compute-cb@10 {
+ compute-cb@12 {
compatible = "qcom,fastrpc-compute-cb";
- reg = <10>;
+ reg = <12>;
iommus = <&apps_smmu 0x240c 0x440>,
<&apps_smmu 0x196c 0x0>,
@@ -8481,9 +8481,9 @@ compute-cb@10 {
dma-coherent;
};
- compute-cb@11 {
+ compute-cb@13 {
compatible = "qcom,fastrpc-compute-cb";
- reg = <11>;
+ reg = <13>;
iommus = <&apps_smmu 0x240d 0x440>,
<&apps_smmu 0x196d 0x0>,
@@ -8491,9 +8491,9 @@ compute-cb@11 {
dma-coherent;
};
- compute-cb@12 {
+ compute-cb@14 {
compatible = "qcom,fastrpc-compute-cb";
- reg = <12>;
+ reg = <14>;
iommus = <&apps_smmu 0x240e 0x440>,
<&apps_smmu 0x196e 0x0>,
---
base-commit: 5c4d4169604b335c38bbc79bc1fc03042981fc6f
change-id: 20260922-glymur-dtfix-6314526b4b02
Best regards,
--
Ekansh Gupta <ekansh.gupta@oss.qualcomm.com>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] arm64: dts: qcom: glymur: Fix fastrpc compute-cb reg values for cdsp
2026-09-22 6:40 [PATCH] arm64: dts: qcom: glymur: Fix fastrpc compute-cb reg values for cdsp Ekansh Gupta
@ 2026-09-22 7:05 ` Abel Vesa
2026-09-22 8:59 ` Pankaj Patil
2026-09-22 9:01 ` Konrad Dybcio
2 siblings, 0 replies; 5+ messages in thread
From: Abel Vesa @ 2026-09-22 7:05 UTC (permalink / raw)
To: Ekansh Gupta
Cc: Bjorn Andersson, Konrad Dybcio, Abel Vesa, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Sibi Sankar, Bharath Kumar,
Chenna Kesava Raju, Konrad Dybcio, linux-arm-msm, devicetree,
linux-kernel, Mahima Bhattaram
On 26-09-22 12:10:58, Ekansh Gupta wrote:
> The reg value of a compute-cb node must match the SID (the lower
> nibble of its IOMMU stream ID) it is associated with. In the cdsp
> fastrpc node, compute-cb@10, compute-cb@11 and compute-cb@12 were
> mistakenly given reg values of 10, 11 and 12 instead of 12, 13 and
> 14, which don't match their SIDs and leads to SMMU translation errors.
> Fix the reg values, and rename the nodes accordingly.
>
> Fixes: cd1d174c75f7 ("arm64: dts: qcom: glymur: Add ADSP and CDSP for Glymur SoC")
> Co-developed-by: Mahima Bhattaram <mbhattar@qti.qualcomm.com>
> Signed-off-by: Mahima Bhattaram <mbhattar@qti.qualcomm.com>
> Signed-off-by: Ekansh Gupta <ekansh.gupta@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] arm64: dts: qcom: glymur: Fix fastrpc compute-cb reg values for cdsp
2026-09-22 6:40 [PATCH] arm64: dts: qcom: glymur: Fix fastrpc compute-cb reg values for cdsp Ekansh Gupta
2026-09-22 7:05 ` Abel Vesa
@ 2026-09-22 8:59 ` Pankaj Patil
2026-09-22 9:01 ` Konrad Dybcio
2 siblings, 0 replies; 5+ messages in thread
From: Pankaj Patil @ 2026-09-22 8:59 UTC (permalink / raw)
To: Ekansh Gupta, Bjorn Andersson, Konrad Dybcio, Abel Vesa,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Sibi Sankar
Cc: Bharath Kumar, Chenna Kesava Raju, Konrad Dybcio, linux-arm-msm,
devicetree, linux-kernel, Mahima Bhattaram
On 9/22/2026 12:10 PM, Ekansh Gupta wrote:
> The reg value of a compute-cb node must match the SID (the lower
> nibble of its IOMMU stream ID) it is associated with. In the cdsp
> fastrpc node, compute-cb@10, compute-cb@11 and compute-cb@12 were
> mistakenly given reg values of 10, 11 and 12 instead of 12, 13 and
> 14, which don't match their SIDs and leads to SMMU translation errors.
> Fix the reg values, and rename the nodes accordingly.
>
> Fixes: cd1d174c75f7 ("arm64: dts: qcom: glymur: Add ADSP and CDSP for Glymur SoC")
> Co-developed-by: Mahima Bhattaram <mbhattar@qti.qualcomm.com>
> Signed-off-by: Mahima Bhattaram <mbhattar@qti.qualcomm.com>
> Signed-off-by: Ekansh Gupta <ekansh.gupta@oss.qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/glymur.dtsi | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi
> index de7c395d9c35..51fea666efac 100644
> --- a/arch/arm64/boot/dts/qcom/glymur.dtsi
> +++ b/arch/arm64/boot/dts/qcom/glymur.dtsi
> @@ -8471,9 +8471,9 @@ compute-cb@8 {
>
> /* note: compute-cb@9 is secure */
>
> - compute-cb@10 {
> + compute-cb@12 {
> compatible = "qcom,fastrpc-compute-cb";
> - reg = <10>;
> + reg = <12>;
>
> iommus = <&apps_smmu 0x240c 0x440>,
> <&apps_smmu 0x196c 0x0>,
> @@ -8481,9 +8481,9 @@ compute-cb@10 {
> dma-coherent;
> };
>
> - compute-cb@11 {
> + compute-cb@13 {
> compatible = "qcom,fastrpc-compute-cb";
> - reg = <11>;
> + reg = <13>;
>
> iommus = <&apps_smmu 0x240d 0x440>,
> <&apps_smmu 0x196d 0x0>,
> @@ -8491,9 +8491,9 @@ compute-cb@11 {
> dma-coherent;
> };
>
> - compute-cb@12 {
> + compute-cb@14 {
> compatible = "qcom,fastrpc-compute-cb";
> - reg = <12>;
> + reg = <14>;
>
> iommus = <&apps_smmu 0x240e 0x440>,
> <&apps_smmu 0x196e 0x0>,
>
> ---
> base-commit: 5c4d4169604b335c38bbc79bc1fc03042981fc6f
> change-id: 20260922-glymur-dtfix-6314526b4b02
>
> Best regards,
Reviewed-by: Pankaj Patil <pankaj.patil@oss.qualcomm.com>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] arm64: dts: qcom: glymur: Fix fastrpc compute-cb reg values for cdsp
2026-09-22 6:40 [PATCH] arm64: dts: qcom: glymur: Fix fastrpc compute-cb reg values for cdsp Ekansh Gupta
2026-09-22 7:05 ` Abel Vesa
2026-09-22 8:59 ` Pankaj Patil
@ 2026-09-22 9:01 ` Konrad Dybcio
2026-09-22 12:07 ` Ekansh Gupta
2 siblings, 1 reply; 5+ messages in thread
From: Konrad Dybcio @ 2026-09-22 9:01 UTC (permalink / raw)
To: Ekansh Gupta, Bjorn Andersson, Konrad Dybcio, Abel Vesa,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Sibi Sankar
Cc: Bharath Kumar, Chenna Kesava Raju, linux-arm-msm, devicetree,
linux-kernel, Mahima Bhattaram
On 9/22/26 8:40 AM, Ekansh Gupta wrote:
> The reg value of a compute-cb node must match the SID (the lower
> nibble of its IOMMU stream ID) it is associated with. In the cdsp
> fastrpc node, compute-cb@10, compute-cb@11 and compute-cb@12 were
> mistakenly given reg values of 10, 11 and 12 instead of 12, 13 and
> 14, which don't match their SIDs and leads to SMMU translation errors.
> Fix the reg values, and rename the nodes accordingly.
>
> Fixes: cd1d174c75f7 ("arm64: dts: qcom: glymur: Add ADSP and CDSP for Glymur SoC")
> Co-developed-by: Mahima Bhattaram <mbhattar@qti.qualcomm.com>
> Signed-off-by: Mahima Bhattaram <mbhattar@qti.qualcomm.com>
> Signed-off-by: Ekansh Gupta <ekansh.gupta@oss.qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/glymur.dtsi | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi
> index de7c395d9c35..51fea666efac 100644
> --- a/arch/arm64/boot/dts/qcom/glymur.dtsi
> +++ b/arch/arm64/boot/dts/qcom/glymur.dtsi
> @@ -8471,9 +8471,9 @@ compute-cb@8 {
>
> /* note: compute-cb@9 is secure */
>
> - compute-cb@10 {
> + compute-cb@12 {
The unit address is interpreted as hex
Konrad
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] arm64: dts: qcom: glymur: Fix fastrpc compute-cb reg values for cdsp
2026-09-22 9:01 ` Konrad Dybcio
@ 2026-09-22 12:07 ` Ekansh Gupta
0 siblings, 0 replies; 5+ messages in thread
From: Ekansh Gupta @ 2026-09-22 12:07 UTC (permalink / raw)
To: Konrad Dybcio, Bjorn Andersson, Konrad Dybcio, Abel Vesa,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Sibi Sankar
Cc: Bharath Kumar, Chenna Kesava Raju, linux-arm-msm, devicetree,
linux-kernel, Mahima Bhattaram
On 22-09-2026 14:31, Konrad Dybcio wrote:
> On 9/22/26 8:40 AM, Ekansh Gupta wrote:
>> The reg value of a compute-cb node must match the SID (the lower
>> nibble of its IOMMU stream ID) it is associated with. In the cdsp
>> fastrpc node, compute-cb@10, compute-cb@11 and compute-cb@12 were
>> mistakenly given reg values of 10, 11 and 12 instead of 12, 13 and
>> 14, which don't match their SIDs and leads to SMMU translation errors.
>> Fix the reg values, and rename the nodes accordingly.
>>
>> Fixes: cd1d174c75f7 ("arm64: dts: qcom: glymur: Add ADSP and CDSP for Glymur SoC")
>> Co-developed-by: Mahima Bhattaram <mbhattar@qti.qualcomm.com>
>> Signed-off-by: Mahima Bhattaram <mbhattar@qti.qualcomm.com>
>> Signed-off-by: Ekansh Gupta <ekansh.gupta@oss.qualcomm.com>
>> ---
>> arch/arm64/boot/dts/qcom/glymur.dtsi | 12 ++++++------
>> 1 file changed, 6 insertions(+), 6 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi
>> index de7c395d9c35..51fea666efac 100644
>> --- a/arch/arm64/boot/dts/qcom/glymur.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/glymur.dtsi
>> @@ -8471,9 +8471,9 @@ compute-cb@8 {
>>
>> /* note: compute-cb@9 is secure */
>>
>> - compute-cb@10 {
>> + compute-cb@12 {
>
> The unit address is interpreted as hex
>
> Konrad
Thanks for pointing this out, I followed other DT files for this. I'll
change this one to hex (@c, @d, @e) in next revision.
^ permalink raw reply [flat|nested] 5+ messages in thread
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2026-09-22 6:40 [PATCH] arm64: dts: qcom: glymur: Fix fastrpc compute-cb reg values for cdsp Ekansh Gupta
2026-09-22 7:05 ` Abel Vesa
2026-09-22 8:59 ` Pankaj Patil
2026-09-22 9:01 ` Konrad Dybcio
2026-09-22 12:07 ` Ekansh Gupta
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