Re: [PATCH v12 1/4] dt-bindings: pwm: dwc: Document optional resets property

[Philipp Zabel <p.zabel@pengutronix.de>]

On Di, 2026-07-21 at 20:08 +0800, dongxuyang@eswincomputing.com wrote:
> From: Xuyang Dong <dongxuyang@eswincomputing.com>
> 
> The DesignWare PWM IP has two active-low reset inputs: presetn resets
> the register interface logic in the pclk (bus) domain, and
> timer_N_resetn resets the counter/timer logic in the timer_N_clk
> domain. The existing snps,dw-apb-timers-pwm2 binding does not
> describe either of these lines.
> 
> Add the resets property and describe the function of each reset to
> support future use of resets.
> 
> Acked-by: Conor Dooley <conor.dooley@microchip.com>
> Signed-off-by: Xuyang Dong <dongxuyang@eswincomputing.com>
> ---
>  .../devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml     | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml b/Documentation/devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml
> index 7523a89a1773..213fdaef25d9 100644
> --- a/Documentation/devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml
> +++ b/Documentation/devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml
> @@ -43,6 +43,11 @@ properties:
>        - const: bus
>        - const: timer
>  
> +  resets:
> +    items:
> +      - description: Interface bus (presetn) reset
> +      - description: PWM timer logic (timer_N_resetn) reset
> +

I suggest adding a reset-names property. Without that the descriptions
are useless, as driver code will not be able to control the resets
individually.

regards
Philipp