From: "Xuyang Dong" <dongxuyang@eswincomputing.com>
To: "Philipp Zabel" <p.zabel@pengutronix.de>,
ukleinek@kernel.org, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, ben-linux@fluff.org,
ben.dooks@codethink.co.uk, linux-pwm@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
daniel.lezcano@kernel.org, tglx@kernel.org
Cc: ningyu@eswincomputing.com, linmin@eswincomputing.com,
xuxiang@eswincomputing.com, wangguosheng@eswincomputing.com,
pinkesh.vaghela@einfochips.com
Subject: Re: Re: [PATCH v12 3/4] pwm: dwc: add of/platform support
Date: Wed, 22 Jul 2026 15:41:35 +0800 (GMT+08:00) [thread overview]
Message-ID: <702dd081.8902.19f88c5db00.Coremail.dongxuyang@eswincomputing.com> (raw)
In-Reply-To: <f7b1c5f1594c99e662d0033dc002ff1a46f17107.camel@pengutronix.de>
>
> On Di, 2026-07-21 at 20:09 +0800, dongxuyang@eswincomputing.com wrote:
> > From: Xuyang Dong <dongxuyang@eswincomputing.com>
> >
> > The dwc pwm controller can be used in non-PCI systems, so allow
> > either platform or OF based probing.
> >
> > The controller is reset only when no PWM channel is enabled.
> > Otherwise, clocks are enabled and the runtime PM state is updated
> > to reflect the active hardware configuration.
> >
> > The DWC PWM controller does not provide a hardware polarity bit.
> > Currently, the driver only supports active-low output, which is
> > incompatible with devices requiring active-high waveforms (e.g.,
> > backlight controllers, fan speed regulators).
> >
> > Implement polarity control by exploiting the timer's dual load
> > registers. The hardware uses:
> > - LD_CNT: LOW period count
> > - LD_CNT2: HIGH period count
> >
> > The total period is defined as (LD_CNT + LD_CNT2). By swapping the
> > duty cycle between these registers, we invert the polarity while
> > keeping the period unchanged:
> > - PWM_POLARITY_NORMAL: write duty_cycle to LD_CNT2 (HIGH period)
> > - PWM_POLARITY_INVERSED: write duty_cycle to LD_CNT (LOW period)
> >
> > Implementation:
> > Update both apply() and get_state() to handle state->polarity
> > consistently. Since the hardware does not store polarity, get_state()
> > returns the last successfully applied software state, ensuring that
> > read-back matches what was originally set.
> >
> > Co-developed-by: Ben Dooks <ben.dooks@codethink.co.uk>
> > Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
> > Signed-off-by: Xiang Xu <xuxiang@eswincomputing.com>
> > Signed-off-by: Guosheng Wang <wangguosheng@eswincomputing.com>
> > Signed-off-by: Xuyang Dong <dongxuyang@eswincomputing.com>
> > ---
> > drivers/pwm/Kconfig | 10 ++
> > drivers/pwm/Makefile | 1 +
> > drivers/pwm/pwm-dwc-core.c | 172 ++++++++++++++++----
> > drivers/pwm/pwm-dwc-of.c | 312 +++++++++++++++++++++++++++++++++++++
> > drivers/pwm/pwm-dwc.h | 25 ++-
> > 5 files changed, 481 insertions(+), 39 deletions(-)
> > create mode 100644 drivers/pwm/pwm-dwc-of.c
> >
> [...]
> > diff --git a/drivers/pwm/pwm-dwc-of.c b/drivers/pwm/pwm-dwc-of.c
> > new file mode 100644
> > index 000000000000..460863549274
> > --- /dev/null
> > +++ b/drivers/pwm/pwm-dwc-of.c
> > @@ -0,0 +1,312 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * DesignWare PWM Controller driver OF
> > + *
> > + * Copyright (C) 2026 SiFive, Inc.
> > + */
> > +
> > +#define DEFAULT_SYMBOL_NAMESPACE "dwc_pwm_of"
> > +
> > +#include <linux/clk.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/pm_runtime.h>
> > +#include <linux/pwm.h>
> > +#include <linux/reset.h>
> > +
> > +#include "pwm-dwc.h"
> > +
> > +struct dwc_pwm_plat_data {
> > + bool reset_required;
>
> This is not needed.
>
Hi Philipp,
We will drop it in the next version.
> > +};
> > +
> > +static int dwc_pwm_plat_probe(struct platform_device *pdev)
> > +{
> [...]
> > + pdata = device_get_match_data(dev);
> > + if (pdata && pdata->reset_required)
> > + dwc->rst = devm_reset_control_get_exclusive(dev, NULL);
> > + else
> > + dwc->rst = devm_reset_control_array_get_optional_exclusive(dev);
>
> Please drop reset_required from pdata and just use
>
> dwc->rst = devm_reset_control_array_get_optional_exclusive(dev);
>
> That works for a single reset as well.
>
> Device tree validation already makes sure required reset controls are
> present. There is no need handle this in the driver as a special case.
>
Use dwc->rst = devm_reset_control_array_get_optional_exclusive(dev);
> > +
> > + if (IS_ERR(dwc->rst))
> > + return dev_err_probe(dev, PTR_ERR(dwc->rst),
> > + "failed to get reset control\n");
> > +
> > + ret = clk_prepare_enable(dwc->bus_clk);
> > + if (ret)
> > + return dev_err_probe(dev, ret,
> > + "failed to enable bus clock\n");
> > +
> > + ret = clk_prepare_enable(dwc->clk);
> > + if (ret) {
> > + dev_err(dev, "failed to enable timer clock\n");
>
> dev_err_probe(dev, "failed to enable timer clock\n");
>
> prints the actual error. Same for other dev_err()s in the probe
> function.
>
Use dev_err_probe() instead of dev_err() in the probe function.
Best regards,
Xuyang Dong
next prev parent reply other threads:[~2026-07-22 7:41 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-21 12:07 [PATCH v12 0/4] Update designware pwm driver Xuyang Dong
2026-07-21 12:08 ` [PATCH v12 1/4] dt-bindings: pwm: dwc: Document optional resets property dongxuyang
2026-07-21 12:50 ` Philipp Zabel
2026-07-22 7:41 ` Xuyang Dong
2026-07-21 12:08 ` [PATCH v12 2/4] dt-bindings: pwm: dwc: Add eswin compatible dongxuyang
2026-07-21 12:52 ` Philipp Zabel
2026-07-22 7:41 ` Xuyang Dong
2026-07-21 12:09 ` [PATCH v12 3/4] pwm: dwc: add of/platform support dongxuyang
2026-07-21 13:10 ` Philipp Zabel
2026-07-22 7:41 ` Xuyang Dong [this message]
2026-07-21 12:09 ` [PATCH v12 4/4] dt-bindings: timer: dwc: Update resets property items dongxuyang
[not found] ` <20260721122141.D3A9C1F00A3D@smtp.kernel.org>
2026-07-23 7:18 ` Xuyang Dong
2026-07-24 5:54 ` Krzysztof Kozlowski
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