From: "Suthikulpanit, Suravee" <suravee.suthikulpanit@amd.com>
To: Jason Gunthorpe <jgg@nvidia.com>
Cc: linux-kernel@vger.kernel.org, iommu@lists.linux.dev,
joro@8bytes.org, robin.murphy@arm.com, vasant.hegde@amd.com,
ubizjak@gmail.com, jon.grimm@amd.com, santosh.shukla@amd.com,
pandoh@google.com, kumaranand@google.com
Subject: Re: [PATCH v2 2/5] iommu/amd: Introduce rw_semaphore for Device Table Entry (DTE)
Date: Thu, 5 Sep 2024 13:20:42 +0700 [thread overview]
Message-ID: <096dc644-c42b-4d59-9306-4007d04b779e@amd.com> (raw)
In-Reply-To: <20240829193402.GK3773488@nvidia.com>
Hi,
On 8/30/2024 2:34 AM, Jason Gunthorpe wrote:
> On Thu, Aug 29, 2024 at 06:07:23PM +0000, Suravee Suthikulpanit wrote:
>
>> -static void clear_dte_entry(struct amd_iommu *iommu, u16 devid)
>> +static void clear_dte_entry(struct amd_iommu *iommu, struct iommu_dev_data *dev_data)
>> {
>> + u16 devid = dev_data->devid;
>> struct dev_table_entry *dev_table = get_dev_table(iommu);
>>
>> + down_write(&dev_data->dte_sem);
>> +
>> /* remove entry from the device table seen by the hardware */
>> dev_table[devid].data[0] = DTE_FLAG_V;
>
> The rest of this function doesn't seem very good either:
>
> /* remove entry from the device table seen by the hardware */
> dev_table[devid].data[0] = DTE_FLAG_V;
>
> if (!amd_iommu_snp_en)
> dev_table[devid].data[0] |= DTE_FLAG_TV;
>
> dev_table[devid].data[1] &= DTE_FLAG_MASK;
>
> This should also cmpxchg the whole 128 bit quantity, you don't want
> the HW to see a tear on HostPageTableRootPtr.
>
> Which is back to my other point. Don't edit the DTE in place.
Thanks for pointing this out. I missed the detail in this function while
going through the driver to update the code, which updates live DTE.
I'll change this.
> There is no such thing as 'clear' in the iommu domain API. The DTE is
> either PAGING, BLOCKED or IDENTITY, and any write to it should be
> writing an entire DTE for that target.
>
> I guess clear is actually trying to set the DTE to BLOCKING?
Yes, it's called from blocked_domain->attach_dev() and when doing
amd_iommu_detach_device().
> Also no need to get the lock here because you don't touch 128 bit
> quanta [1] which holds the IRQ stuff that is racey. This is already
> locked by the iommu core group lock.
Actually, we Need to preserve DTE[96:106] because certain fields are
programmed using value in IVRS table from early init phase. So, to avoid
try_cmpxchg128 failure, I need to spin_lock on dte_lock across the
get_dte256() and update_dte256()
Thanks,
Suravee
next prev parent reply other threads:[~2024-09-05 6:20 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-29 18:07 [PATCH v2 0/5] iommu/amd: Use 128-bit cmpxchg operation to update DTE Suravee Suthikulpanit
2024-08-29 18:07 ` [PATCH v2 1/5] iommu/amd: Disable AMD IOMMU if CMPXCHG16B feature is not supported Suravee Suthikulpanit
2024-08-29 18:07 ` [PATCH v2 2/5] iommu/amd: Introduce rw_semaphore for Device Table Entry (DTE) Suravee Suthikulpanit
2024-08-29 19:34 ` Jason Gunthorpe
2024-09-05 6:20 ` Suthikulpanit, Suravee [this message]
2024-09-05 12:15 ` Jason Gunthorpe
2024-08-29 18:07 ` [PATCH v2 3/5] iommu/amd: Introduce helper functions to access and update 256-bit DTE Suravee Suthikulpanit
2024-08-29 19:28 ` Jason Gunthorpe
2024-09-05 17:54 ` Suthikulpanit, Suravee
2024-09-05 18:21 ` Jason Gunthorpe
2024-09-06 14:08 ` Suthikulpanit, Suravee
2024-09-06 16:01 ` Jason Gunthorpe
2024-08-29 18:07 ` [PATCH v2 4/5] iommu/amd: Modify set_dte_entry() to use 256-bit DTE helpers Suravee Suthikulpanit
2024-08-29 18:07 ` [PATCH v2 5/5] iommu/amd: Use 128-bit cmpxchg in set_dte_irq_entry() Suravee Suthikulpanit
2024-08-29 19:40 ` Jason Gunthorpe
2024-09-05 5:32 ` Suthikulpanit, Suravee
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=096dc644-c42b-4d59-9306-4007d04b779e@amd.com \
--to=suravee.suthikulpanit@amd.com \
--cc=iommu@lists.linux.dev \
--cc=jgg@nvidia.com \
--cc=jon.grimm@amd.com \
--cc=joro@8bytes.org \
--cc=kumaranand@google.com \
--cc=linux-kernel@vger.kernel.org \
--cc=pandoh@google.com \
--cc=robin.murphy@arm.com \
--cc=santosh.shukla@amd.com \
--cc=ubizjak@gmail.com \
--cc=vasant.hegde@amd.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®