From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
To: <linux-kernel@vger.kernel.org>, <iommu@lists.linux.dev>
Cc: <joro@8bytes.org>, <robin.murphy@arm.com>, <vasant.hegde@amd.com>,
<ubizjak@gmail.com>, <jgg@nvidia.com>, <jon.grimm@amd.com>,
<santosh.shukla@amd.com>, <pandoh@google.com>,
<kumaranand@google.com>,
Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Subject: [PATCH v2 2/5] iommu/amd: Introduce rw_semaphore for Device Table Entry (DTE)
Date: Thu, 29 Aug 2024 18:07:23 +0000 [thread overview]
Message-ID: <20240829180726.5022-3-suravee.suthikulpanit@amd.com> (raw)
In-Reply-To: <20240829180726.5022-1-suravee.suthikulpanit@amd.com>
In preparation for 256-bit DTE update, each DTE access/update needs
to be protected using synchronication mechanism to prevent conflict.
Introduce a new rw-semaphore struct dev_data.dte_sem, which is per
device. Also update certain helper functions to use the new dte_sem.
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
---
drivers/iommu/amd/amd_iommu_types.h | 1 +
drivers/iommu/amd/iommu.c | 10 ++++++++--
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_iommu_types.h
index c9f9a598eb82..65f3a073999d 100644
--- a/drivers/iommu/amd/amd_iommu_types.h
+++ b/drivers/iommu/amd/amd_iommu_types.h
@@ -833,6 +833,7 @@ struct devid_map {
struct iommu_dev_data {
/*Protect against attach/detach races */
spinlock_t lock;
+ struct rw_semaphore dte_sem;
struct list_head list; /* For domain->dev_list */
struct llist_node dev_data_list; /* For global dev_data_list */
diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index 87c5385ce3f2..994ed02842b9 100644
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -205,6 +205,7 @@ static struct iommu_dev_data *alloc_dev_data(struct amd_iommu *iommu, u16 devid)
return NULL;
spin_lock_init(&dev_data->lock);
+ init_rwsem(&dev_data->dte_sem);
dev_data->devid = devid;
ratelimit_default_init(&dev_data->rs);
@@ -1946,10 +1947,13 @@ static void set_dte_entry(struct amd_iommu *iommu,
}
}
-static void clear_dte_entry(struct amd_iommu *iommu, u16 devid)
+static void clear_dte_entry(struct amd_iommu *iommu, struct iommu_dev_data *dev_data)
{
+ u16 devid = dev_data->devid;
struct dev_table_entry *dev_table = get_dev_table(iommu);
+ down_write(&dev_data->dte_sem);
+
/* remove entry from the device table seen by the hardware */
dev_table[devid].data[0] = DTE_FLAG_V;
@@ -1959,6 +1963,8 @@ static void clear_dte_entry(struct amd_iommu *iommu, u16 devid)
dev_table[devid].data[1] &= DTE_FLAG_MASK;
amd_iommu_apply_erratum_63(iommu, devid);
+
+ up_write(&dev_data->dte_sem);
}
/* Update and flush DTE for the given device */
@@ -1969,7 +1975,7 @@ void amd_iommu_dev_update_dte(struct iommu_dev_data *dev_data, bool set)
if (set)
set_dte_entry(iommu, dev_data);
else
- clear_dte_entry(iommu, dev_data->devid);
+ clear_dte_entry(iommu, dev_data);
clone_aliases(iommu, dev_data->dev);
device_flush_dte(dev_data);
--
2.34.1
next prev parent reply other threads:[~2024-08-29 18:08 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-29 18:07 [PATCH v2 0/5] iommu/amd: Use 128-bit cmpxchg operation to update DTE Suravee Suthikulpanit
2024-08-29 18:07 ` [PATCH v2 1/5] iommu/amd: Disable AMD IOMMU if CMPXCHG16B feature is not supported Suravee Suthikulpanit
2024-08-29 18:07 ` Suravee Suthikulpanit [this message]
2024-08-29 19:34 ` [PATCH v2 2/5] iommu/amd: Introduce rw_semaphore for Device Table Entry (DTE) Jason Gunthorpe
2024-09-05 6:20 ` Suthikulpanit, Suravee
2024-09-05 12:15 ` Jason Gunthorpe
2024-08-29 18:07 ` [PATCH v2 3/5] iommu/amd: Introduce helper functions to access and update 256-bit DTE Suravee Suthikulpanit
2024-08-29 19:28 ` Jason Gunthorpe
2024-09-05 17:54 ` Suthikulpanit, Suravee
2024-09-05 18:21 ` Jason Gunthorpe
2024-09-06 14:08 ` Suthikulpanit, Suravee
2024-09-06 16:01 ` Jason Gunthorpe
2024-08-29 18:07 ` [PATCH v2 4/5] iommu/amd: Modify set_dte_entry() to use 256-bit DTE helpers Suravee Suthikulpanit
2024-08-29 18:07 ` [PATCH v2 5/5] iommu/amd: Use 128-bit cmpxchg in set_dte_irq_entry() Suravee Suthikulpanit
2024-08-29 19:40 ` Jason Gunthorpe
2024-09-05 5:32 ` Suthikulpanit, Suravee
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