From: Dou Liyang <douly.fnst@cn.fujitsu.com>
To: Alexandru Chirvasitu <achirvasub@gmail.com>
Cc: Thomas Gleixner <tglx@linutronix.de>,
Dexuan Cui <decui@microsoft.com>, Pavel Machek <pavel@ucw.cz>,
kernel list <linux-kernel@vger.kernel.org>,
Ingo Molnar <mingo@redhat.com>,
"Maciej W. Rozycki" <macro@linux-mips.org>,
Mikael Pettersson <mikpelinux@gmail.com>,
Josh Poulson <jopoulso@microsoft.com>,
"Mihai Costache (Cloudbase Solutions SRL)"
<v-micos@microsoft.com>,
Stephen Hemminger <sthemmin@microsoft.com>,
Marc Zyngier <marc.zyngier@arm.com>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
Haiyang Zhang <haiyangz@microsoft.com>,
Simon Xiao <sixiao@microsoft.com>,
Saeed Mahameed <saeedm@mellanox.com>,
Jork Loeser <Jork.Loeser@microsoft.com>,
Bjorn Helgaas <bhelgaas@google.com>,
"devel@linuxdriverproject.org" <devel@linuxdriverproject.org>,
KY Srinivasan <kys@microsoft.com>
Subject: Re: PROBLEM: 4.15.0-rc3 APIC causes lockups on Core 2 Duo laptop
Date: Thu, 28 Dec 2017 18:23:39 +0800 [thread overview]
Message-ID: <0b98e96f-e176-9288-b54c-8ea908954c01@cn.fujitsu.com> (raw)
In-Reply-To: <20171228025114.wdydzgppfikuo65z@D-69-91-141-110.dhcp4.washington.edu>
[-- Attachment #1: Type: text/plain, Size: 1049 bytes --]
Hi Alexandru,
At 12/28/2017 10:51 AM, Alexandru Chirvasitu wrote:
> Ah, of course. Attached is the output of `journalctl --boot=-1` after
> booting, getting locked up, and then rebooting a good kernel.
>
For the Hard lockups on both CPUs after login:
Please try the patch in the attachment by
git am ./0001-x86-vector-Replace-the-raw_spin_lock-with-raw_spin_l.patch
or
patch -p1 <
./0001-x86-vector-Replace-the-raw_spin_lock-with-raw_spin_l.patch
> Slightly different version of 4.15-rc5; this one has both patches
> applied, yours and Linus' for kexec, but the latter shouldn't make a
> difference.
>
> ---
>
> You'll see another trace in there that's been bugging me, about W=X
> checking. I'm not qualified to judge how related they are, but during
> these past few days I've compiled and tested many kernels, and many of
> them have exhibited the W+X thing but*not* the lockups.
>
Yes, I found it, but I am not familiar with it and have no idea.
Thanks,
dou.
---------------------8<--------------------------------------------
[-- Attachment #2: 0001-x86-vector-Replace-the-raw_spin_lock-with-raw_spin_l.patch --]
[-- Type: text/x-patch, Size: 1382 bytes --]
>From 57d8543ea4dcf2a53b1c37757da12866a52aaf57 Mon Sep 17 00:00:00 2001
From: Dou Liyang <douly.fnst@cn.fujitsu.com>
Date: Thu, 28 Dec 2017 16:20:48 +0800
Subject: [PATCH] x86/vector: Replace the raw_spin_lock() with
raw_spin_lock_irqsave()
Signed-off-by: Dou Liyang <douly.fnst@cn.fujitsu.com>
---
arch/x86/kernel/apic/vector.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/apic/vector.c b/arch/x86/kernel/apic/vector.c
index 750449152b04..a43ca26d5dfd 100644
--- a/arch/x86/kernel/apic/vector.c
+++ b/arch/x86/kernel/apic/vector.c
@@ -726,6 +726,7 @@ static int apic_set_affinity(struct irq_data *irqd,
const struct cpumask *dest, bool force)
{
struct apic_chip_data *apicd = apic_chip_data(irqd);
+ unsigned long flags;
int err;
/*
@@ -740,13 +741,13 @@ static int apic_set_affinity(struct irq_data *irqd,
(apicd->is_managed || apicd->can_reserve))
return IRQ_SET_MASK_OK;
- raw_spin_lock(&vector_lock);
+ raw_spin_lock_irqsave(&vector_lock, flags);
cpumask_and(vector_searchmask, dest, cpu_online_mask);
if (irqd_affinity_is_managed(irqd))
err = assign_managed_vector(irqd, vector_searchmask);
else
err = assign_vector_locked(irqd, vector_searchmask);
- raw_spin_unlock(&vector_lock);
+ raw_spin_unlock_irqrestore(&vector_lock, flags);
return err ? err : IRQ_SET_MASK_OK;
}
--
2.14.3
next prev parent reply other threads:[~2017-12-28 10:23 UTC|newest]
Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20171218082011.GA24638@arch-chirva.localdomain>
2017-12-18 10:11 ` Pavel Machek
2017-12-19 8:34 ` Alexandru Chirvasitu
2017-12-20 0:31 ` Thomas Gleixner
2017-12-20 3:58 ` Dou Liyang
2017-12-20 13:19 ` Alexandru Chirvasitu
2017-12-20 19:45 ` Alexandru Chirvasitu
2017-12-21 2:23 ` Alexandru Chirvasitu
2017-12-22 10:28 ` Dou Liyang
[not found] ` <20171222142053.3cbhi2nhh24w7yoo@D-69-91-141-110.dhcp4.washington.edu>
2017-12-22 21:31 ` Dexuan Cui
[not found] ` <20171222222917.GA1138@arch-chirva.localdomain>
2017-12-23 1:35 ` Dexuan Cui
2017-12-23 4:51 ` Alexandru Chirvasitu
2017-12-23 13:32 ` Thomas Gleixner
2017-12-23 20:01 ` Alexandru Chirvasitu
2017-12-27 8:14 ` Dou Liyang
2017-12-27 16:18 ` Alexandru Chirvasitu
[not found] ` <20171227195007.GF1410@arch-chirva.localdomain>
2017-12-27 23:13 ` Alexandru Chirvasitu
2017-12-28 2:06 ` Dou Liyang
2017-12-28 2:51 ` Alexandru Chirvasitu
2017-12-28 10:23 ` Dou Liyang [this message]
2017-12-24 3:29 ` Dou Liyang
2017-12-28 11:00 ` Thomas Gleixner
2017-12-28 14:21 ` Alexandru Chirvasitu
2017-12-28 14:48 ` Thomas Gleixner
2017-12-28 15:48 ` Alexandru Chirvasitu
2017-12-28 16:05 ` Alexandru Chirvasitu
2017-12-28 16:10 ` Thomas Gleixner
2017-12-28 17:22 ` Alexandru Chirvasitu
2017-12-28 17:29 ` Thomas Gleixner
2017-12-28 17:50 ` Alexandru Chirvasitu
2017-12-28 18:32 ` Thomas Gleixner
2017-12-28 21:54 ` Thomas Gleixner
2017-12-28 22:50 ` Alexandru Chirvasitu
2017-12-28 22:57 ` Thomas Gleixner
2017-12-28 23:19 ` Thomas Gleixner
2017-12-28 23:30 ` Alexandru Chirvasitu
2017-12-28 23:36 ` Thomas Gleixner
2017-12-28 23:59 ` Alexandru Chirvasitu
2017-12-29 8:07 ` Thomas Gleixner
2017-12-29 11:49 ` Alexandru Chirvasitu
2017-12-29 12:22 ` Alexandru Chirvasitu
2017-12-29 13:09 ` Thomas Gleixner
2017-12-29 14:06 ` Alexandru Chirvasitu
2017-12-29 0:15 ` Bjorn Helgaas
2017-12-29 0:38 ` Alexandru Chirvasitu
2017-12-28 11:03 ` Thomas Gleixner
2017-12-28 19:01 ` Dexuan Cui
2017-12-28 20:14 ` Thomas Gleixner
2017-12-28 17:17 IRQ behaivour has been changed from v4.14 to v4.15-rc1 Shevchenko, Andriy
2017-12-28 17:21 ` Thomas Gleixner
2017-12-28 17:34 ` Andy Shevchenko
2017-12-28 17:44 ` Thomas Gleixner
2017-12-28 19:31 ` Andy Shevchenko
2017-12-28 19:36 ` Andy Shevchenko
2017-12-28 20:18 ` Thomas Gleixner
2017-12-28 21:03 ` Andy Shevchenko
2017-12-28 21:31 ` Thomas Gleixner
2017-12-28 21:59 ` Thomas Gleixner
2017-12-29 12:06 ` Andy Shevchenko
2017-12-29 13:10 ` Thomas Gleixner
2017-12-29 14:27 ` Andy Shevchenko
2017-12-29 20:20 ` [tip:irq/urgent] genirq/msi, x86/vector: Prevent reservation mode for non maskable MSI tip-bot for Thomas Gleixner
2017-12-28 17:23 ` IRQ behaivour has been changed from v4.14 to v4.15-rc1 Andy Shevchenko
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