From: "Arnd Bergmann" <arnd@arndb.de>
To: "Eric Biggers" <ebiggers@kernel.org>, linux-kernel@vger.kernel.org
Cc: linux-crypto@vger.kernel.org, "Ard Biesheuvel" <ardb@kernel.org>,
"Alexandre Torgue" <alexandre.torgue@foss.st.com>,
"Fabien Dessenne" <fabien.dessenne@foss.st.com>,
"Lionel DEBIEVE" <lionel.debieve@foss.st.com>,
"Maxime Coquelin" <mcoquelin.stm32@gmail.com>,
linux-stm32@st-md-mailman.stormreply.com
Subject: Re: [PATCH v2] crypto: stm32 - remove crc32 and crc32c support
Date: Wed, 04 Jun 2025 10:38:20 +0200 [thread overview]
Message-ID: <0c760b4f-4f52-4384-b663-3b08e4f92448@app.fastmail.com> (raw)
In-Reply-To: <20250601193441.6913-1-ebiggers@kernel.org>
On Sun, Jun 1, 2025, at 21:34, Eric Biggers wrote:
> From: Eric Biggers <ebiggers@google.com>
>
> Remove the crc32 and crc32c support from the stm32 driver. Since it's
> not wired up to the CRC library, almost no CRC user in the kernel can
> actually be taking advantage of it, so it's effectively dead code.
>
> Support for this hardware could be migrated to the CRC library, but
> there doesn't seem to be much point. This CRC engine is present only on
> a couple older SoCs that lacked CRC instructions.
>
> Even on those SoCs, it's probably not worthwhile. This driver has to
> deal with things like locking and runtime power management that do not
> exist in software CRC code and are a source of bugs (as is clear from
> the commit log) and add significant overhead to the processing of short
> messages, which are common. The patch that originally added this driver
> seemed to justify it based purely on a microbenchmark on Cortex-M7 on
> long messages, not a real use case. These days, if this driver were to
> be used at all it would likely be on Cortex-A7 instead. This CRC engine
> is also not supported by QEMU, making the driver not easily testable.
>
> Acked-by: Ard Biesheuvel <ardb@kernel.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
As far as I can tell, the CRC unit was present on the original
24 MHz STM32F1 (Cortex-M3), where it probably had some merit, and
later chips including the STM32MP1 (Cortex-A7) just incorporated
the block for compatibility.
Arnd
next prev parent reply other threads:[~2025-06-04 8:38 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-01 19:34 Eric Biggers
2025-06-04 8:38 ` Arnd Bergmann [this message]
2025-06-08 23:44 ` Eric Biggers
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