From: Siddharth Vadapalli <s-vadapalli@ti.com>
To: Nishanth Menon <nm@ti.com>
Cc: <vigneshr@ti.com>, <kristo@kernel.org>, <robh+dt@kernel.org>,
<krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>, <danishanwar@ti.com>,
<r-gunasekaran@ti.com>, <srk@ti.com>, <s-vadapalli@ti.com>
Subject: Re: [PATCH v2] arm64: dts: ti: k3-am654-icssg2: Enable PHY interrupts for ICSSG2
Date: Thu, 14 Dec 2023 19:20:32 +0530 [thread overview]
Message-ID: <0cef8f50-6608-cf3d-ad62-1afd3f5560ea@ti.com> (raw)
In-Reply-To: <20231214121727.ayrbqz2nmeb25rpw@striving>
On 14-12-2023 17:47, Nishanth Menon wrote:
...
>>
>> Yes, you are right! Edge-Triggered interrupts shouldn't be shared. I missed
>> noticing this. Thank you for pointing it out. Since the SoC only supports
>> Edge-Triggered interrupts, I believe that the correct decision would be to use
>> the interrupt for only one of the two PHYs, while leaving the other PHY in
>> polled mode of operation which is the default.
>>
>> Kindly let me know if this is acceptable and I shall update this patch accordingly.
>
> Sounds like a bug in board design there (due to an choice of IP
> limitation) - I suggest getting it noted in board documentation and
> refer to the errata in the second phy (else folks will wonder why we
> aren't using interrupts on the second phy.
Thank you for your suggestion on the next steps to be taken. I will
ensure that the board documentation is updated. Additionally, in the v3
patch I will add a comment within the "icssg2_phy0" node indicating that
the interrupt mode of operation is only being enabled for "icssg2_phy0"
due to the interrupt being an edge-triggered interrupt which cannot be
shared among both the PHYs. And for that reason "icssg2_phy1" is being
left in the default polled mode of operation.
--
Regards,
Siddharth.
next prev parent reply other threads:[~2023-12-14 13:51 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-13 8:02 Siddharth Vadapalli
2023-12-13 12:38 ` Nishanth Menon
2023-12-14 5:44 ` Siddharth Vadapalli
2023-12-14 12:17 ` Nishanth Menon
2023-12-14 13:50 ` Siddharth Vadapalli [this message]
2023-12-17 17:44 ` Andrew Lunn
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