From: "Chang S. Bae" <chang.seok.bae@intel.com>
To: Chao Gao <chao.gao@intel.com>
Cc: Dave Hansen <dave.hansen@intel.com>,
Sean Christopherson <seanjc@google.com>, <x86@kernel.org>,
<linux-kernel@vger.kernel.org>, <kvm@vger.kernel.org>,
<tglx@linutronix.de>, <pbonzini@redhat.com>,
<peterz@infradead.org>, <rick.p.edgecombe@intel.com>,
<weijiang.yang@intel.com>, <john.allen@amd.com>, <bp@alien8.de>,
<xin3.li@intel.com>, Dave Hansen <dave.hansen@linux.intel.com>,
Eric Biggers <ebiggers@google.com>,
"H. Peter Anvin" <hpa@zytor.com>, Ingo Molnar <mingo@redhat.com>,
Kees Cook <kees@kernel.org>, Maxim Levitsky <mlevitsk@redhat.com>,
Mitchell Levy <levymitchell0@gmail.com>,
"Nikolay Borisov" <nik.borisov@suse.com>,
Oleg Nesterov <oleg@redhat.com>,
Sohil Mehta <sohil.mehta@intel.com>,
Stanislav Spassov <stanspas@amazon.de>,
"Vignesh Balasubramanian" <vigbalas@amd.com>
Subject: Re: [PATCH v8 0/6] Introduce CET supervisor state support
Date: Tue, 3 Jun 2025 11:32:52 -0700 [thread overview]
Message-ID: <0d9d3317-ad0f-4080-9b24-230b76006d91@intel.com> (raw)
In-Reply-To: <aD6Ukwqz2Q5RKpEm@intel.com>
On 6/2/2025 11:22 PM, Chao Gao wrote:
>
> Aside from the splat, task #2 could execute AMX instructions without
> requesting permissions, but its AMX state would be discarded during the
> next FPU switch, as RFBM[18] is cleared when executing XSAVES. And, in the
Right, AMX instructions can be executed when XFD is disarmed. But in
this case, it's inside a signal handler. On sigreturn, XTILE_DATA will
be reloaded with the init state, since fpstate::user_xfeatures[18] is zero.
> "flipped" scenario you mentioned, task #2 might receive an extra #NM, after
> which its fpstate would be re-allocated (although the size won't increase
> further).
Yes.
> So, for well-behaved tasks that never use AMX, there is no impact; tasks
> that use AMX may receive extra #NM. There won't be any unexpected #PF,
> memory corruption, or kernel panic.
A signal handler is expected to stay within the bounds of
async-signal-safe functions, so using AMX in that context is highly
unlikely in practice. While the issue has existed, its real-world impact
appears quite minimal in my view.
Thanks,
Chang
next prev parent reply other threads:[~2025-06-03 18:33 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-22 15:10 Chao Gao
2025-05-22 15:10 ` [PATCH v8 1/6] x86/fpu/xstate: Differentiate default features for host and guest FPUs Chao Gao
2025-05-29 20:59 ` John Allen
2025-05-22 15:10 ` [PATCH v8 2/6] x86/fpu: Initialize guest FPU permissions from guest defaults Chao Gao
2025-05-29 21:14 ` John Allen
2025-05-22 15:10 ` [PATCH v8 3/6] x86/fpu: Initialize guest fpstate and FPU pseudo container " Chao Gao
2025-05-29 21:25 ` John Allen
2025-05-22 15:10 ` [PATCH v8 4/6] x86/fpu: Remove xfd argument from __fpstate_reset() Chao Gao
2025-05-29 21:26 ` John Allen
2025-05-22 15:10 ` [PATCH v8 5/6] x86/fpu/xstate: Introduce "guest-only" supervisor xfeature set Chao Gao
2025-05-30 16:04 ` John Allen
2025-05-22 15:10 ` [PATCH v8 6/6] x86/fpu/xstate: Add CET supervisor xfeature support as a guest-only feature Chao Gao
2025-05-30 16:05 ` John Allen
2025-05-23 16:57 ` [PATCH v8 0/6] Introduce CET supervisor state support Sean Christopherson
2025-05-23 17:12 ` Dave Hansen
2025-05-23 17:48 ` Sean Christopherson
2025-05-27 11:01 ` Chao Gao
2025-06-02 19:12 ` Chang S. Bae
2025-06-03 6:22 ` Chao Gao
2025-06-03 18:32 ` Chang S. Bae [this message]
2025-06-04 0:56 ` Chao Gao
2025-06-04 18:45 ` Dave Hansen
2025-06-16 8:08 ` Chao Gao
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