[PATCH net-next 0/3] Add shared PHY counter support for QCA807x and QCA808x

[PATCH net-next 0/3] Add shared PHY counter support for QCA807x and QCA808x

[Luo Jie]

The implementation of the PHY counter is identical for both QCA808x and
QCA807x series devices. This includes counters for both good and bad CRC
frames in the RX and TX directions, which are active when CRC checking
is enabled.

This patch series introduces PHY counter functions into a shared library,
enabling counter support for the QCA808x and QCA807x families through this
common infrastructure. Additionally, CRC checking is enabled within
config_init() to ensure accurate counter recording.

Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
---
Luo Jie (3):
      net: phy: qcom: Add PHY counter support
      net: phy: qcom: qca808x: Support PHY counter
      net: phy: qcom: qca807x: Support PHY counter

 drivers/net/phy/qcom/qca807x.c      | 10 +++++
 drivers/net/phy/qcom/qca808x.c      |  7 ++++
 drivers/net/phy/qcom/qcom-phy-lib.c | 82 +++++++++++++++++++++++++++++++++++++
 drivers/net/phy/qcom/qcom.h         | 16 ++++++++
 4 files changed, 115 insertions(+)
---
base-commit: c523058713abac66b0d83ae12a0574d76cd7df2b
change-id: 20250709-qcom_phy_counter-49fe93241fdd

Best regards,
-- 
Luo Jie <quic_luoj@quicinc.com>

[PATCH net-next 1/3] net: phy: qcom: Add PHY counter support

[Luo Jie]

Add PHY counter functionality to the shared library. The implementation
is identical for the current QCA807X and QCA808X PHYs.

Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
---
 drivers/net/phy/qcom/qcom-phy-lib.c | 82 +++++++++++++++++++++++++++++++++++++
 drivers/net/phy/qcom/qcom.h         | 16 ++++++++
 2 files changed, 98 insertions(+)

diff --git a/drivers/net/phy/qcom/qcom-phy-lib.c b/drivers/net/phy/qcom/qcom-phy-lib.c
index d28815ef56bb..6447e590539b 100644
--- a/drivers/net/phy/qcom/qcom-phy-lib.c
+++ b/drivers/net/phy/qcom/qcom-phy-lib.c
@@ -14,6 +14,40 @@ MODULE_AUTHOR("Matus Ujhelyi");
 MODULE_AUTHOR("Christian Marangi <ansuelsmth@gmail.com>");
 MODULE_LICENSE("GPL");
 
+struct qcom_phy_hw_stat {
+	const char *string;
+	int devad;
+	u16 cnt_31_16_reg;
+	u16 cnt_15_0_reg;
+};
+
+static const struct qcom_phy_hw_stat qcom_phy_hw_stats[] = {
+	{
+		.string		= "phy_rx_good_frame",
+		.devad		= MDIO_MMD_AN,
+		.cnt_31_16_reg	= QCA808X_MMD7_CNT_RX_GOOD_CRC_31_16,
+		.cnt_15_0_reg	= QCA808X_MMD7_CNT_RX_GOOD_CRC_15_0,
+	},
+	{
+		.string		= "phy_rx_bad_frame",
+		.devad		= MDIO_MMD_AN,
+		.cnt_31_16_reg	= 0xffff,
+		.cnt_15_0_reg	= QCA808X_MMD7_CNT_RX_BAD_CRC,
+	},
+	{
+		.string		= "phy_tx_good_frame",
+		.devad		= MDIO_MMD_AN,
+		.cnt_31_16_reg	= QCA808X_MMD7_CNT_TX_GOOD_CRC_31_16,
+		.cnt_15_0_reg	= QCA808X_MMD7_CNT_TX_GOOD_CRC_15_0,
+	},
+	{
+		.string		= "phy_tx_bad_frame",
+		.devad		= MDIO_MMD_AN,
+		.cnt_31_16_reg	= 0xffff,
+		.cnt_15_0_reg	= QCA808X_MMD7_CNT_TX_BAD_CRC,
+	},
+};
+
 int at803x_debug_reg_read(struct phy_device *phydev, u16 reg)
 {
 	int ret;
@@ -674,3 +708,51 @@ int qca808x_led_reg_blink_set(struct phy_device *phydev, u16 reg,
 	return 0;
 }
 EXPORT_SYMBOL_GPL(qca808x_led_reg_blink_set);
+
+/* Enable CRC checking for both received and transmitted frames to support
+ * accurate counter recording.
+ */
+int qcom_phy_counter_crc_check_en(struct phy_device *phydev)
+{
+	return phy_set_bits_mmd(phydev, MDIO_MMD_AN, QCA808X_MMD7_CNT_CTRL,
+				QCA808X_MMD7_CNT_CTRL_CRC_CHECK_EN);
+}
+EXPORT_SYMBOL_GPL(qcom_phy_counter_crc_check_en);
+
+int qcom_phy_get_sset_count(struct phy_device *phydev)
+{
+	return ARRAY_SIZE(qcom_phy_hw_stats);
+}
+EXPORT_SYMBOL_GPL(qcom_phy_get_sset_count);
+
+void qcom_phy_get_strings(struct phy_device *phydev, u8 *data)
+{
+	unsigned int i;
+
+	for (i = 0; i < ARRAY_SIZE(qcom_phy_hw_stats); i++)
+		ethtool_puts(&data, qcom_phy_hw_stats[i].string);
+}
+EXPORT_SYMBOL_GPL(qcom_phy_get_strings);
+
+void qcom_phy_get_stats(struct phy_device *phydev, struct ethtool_stats *stats,
+			u64 *data)
+{
+	struct qcom_phy_hw_stat stat;
+	unsigned int i;
+	int ret, cnt;
+
+	for (i = 0; i < ARRAY_SIZE(qcom_phy_hw_stats); i++) {
+		stat = qcom_phy_hw_stats[i];
+		data[i] = U64_MAX;
+
+		ret = phy_read_mmd(phydev, stat.devad, stat.cnt_15_0_reg);
+		if (ret >= 0) {
+			cnt = ret;
+
+			ret = phy_read_mmd(phydev, stat.devad, stat.cnt_31_16_reg);
+			if (ret >= 0)
+				data[i] = cnt | ret << 16;
+		}
+	}
+}
+EXPORT_SYMBOL_GPL(qcom_phy_get_stats);
diff --git a/drivers/net/phy/qcom/qcom.h b/drivers/net/phy/qcom/qcom.h
index 4bb541728846..ee2eb11d8d7e 100644
--- a/drivers/net/phy/qcom/qcom.h
+++ b/drivers/net/phy/qcom/qcom.h
@@ -192,6 +192,17 @@
 #define AT803X_MIN_DOWNSHIFT			2
 #define AT803X_MAX_DOWNSHIFT			9
 
+#define QCA808X_MMD7_CNT_CTRL			0x8029
+#define QCA808X_MMD7_CNT_CTRL_READ_CLEAR_EN	BIT(1)
+#define QCA808X_MMD7_CNT_CTRL_CRC_CHECK_EN	BIT(0)
+
+#define QCA808X_MMD7_CNT_RX_GOOD_CRC_31_16	0x802a
+#define QCA808X_MMD7_CNT_RX_GOOD_CRC_15_0	0x802b
+#define QCA808X_MMD7_CNT_RX_BAD_CRC		0x802c
+#define QCA808X_MMD7_CNT_TX_GOOD_CRC_31_16	0x802d
+#define QCA808X_MMD7_CNT_TX_GOOD_CRC_15_0	0x802e
+#define QCA808X_MMD7_CNT_TX_BAD_CRC		0x802f
+
 enum stat_access_type {
 	PHY,
 	MMD
@@ -241,3 +252,8 @@ int qca808x_led_reg_brightness_set(struct phy_device *phydev,
 int qca808x_led_reg_blink_set(struct phy_device *phydev, u16 reg,
 			      unsigned long *delay_on,
 			      unsigned long *delay_off);
+int qcom_phy_counter_crc_check_en(struct phy_device *phydev);
+int qcom_phy_get_sset_count(struct phy_device *phydev);
+void qcom_phy_get_strings(struct phy_device *phydev, u8 *data);
+void qcom_phy_get_stats(struct phy_device *phydev, struct ethtool_stats *stats,
+			u64 *data);

-- 
2.34.1

Re: [PATCH net-next 1/3] net: phy: qcom: Add PHY counter support

[Andrew Lunn]

> +static const struct qcom_phy_hw_stat qcom_phy_hw_stats[] = {
> +	{
> +		.string		= "phy_rx_good_frame",
> +		.devad		= MDIO_MMD_AN,
> +		.cnt_31_16_reg	= QCA808X_MMD7_CNT_RX_GOOD_CRC_31_16,
> +		.cnt_15_0_reg	= QCA808X_MMD7_CNT_RX_GOOD_CRC_15_0,
> +	},
> +	{
> +		.string		= "phy_rx_bad_frame",
> +		.devad		= MDIO_MMD_AN,
> +		.cnt_31_16_reg	= 0xffff,
> +		.cnt_15_0_reg	= QCA808X_MMD7_CNT_RX_BAD_CRC,
> +	},
> +	{
> +		.string		= "phy_tx_good_frame",
> +		.devad		= MDIO_MMD_AN,
> +		.cnt_31_16_reg	= QCA808X_MMD7_CNT_TX_GOOD_CRC_31_16,
> +		.cnt_15_0_reg	= QCA808X_MMD7_CNT_TX_GOOD_CRC_15_0,
> +	},
> +	{
> +		.string		= "phy_tx_bad_frame",
> +		.devad		= MDIO_MMD_AN,

Are there any counters which might be added later which are not in
MDIO_MMD_AN? It seems pointless having this if it is fixed.

> +		.cnt_31_16_reg	= 0xffff,
> +		.cnt_15_0_reg	= QCA808X_MMD7_CNT_TX_BAD_CRC,
> +	},
> +};

There has been an attempt to try to standardise PHY statistics. Please
look at:

**
 * struct ethtool_phy_stats - PHY-level statistics counters
 * @rx_packets: Total successfully received frames
 * @rx_bytes: Total successfully received bytes
 * @rx_errors: Total received frames with errors (e.g., CRC errors)
 * @tx_packets: Total successfully transmitted frames
 * @tx_bytes: Total successfully transmitted bytes
 * @tx_errors: Total transmitted frames with errors
 *
 * This structure provides a standardized interface for reporting
 * PHY-level statistics counters. It is designed to expose statistics
 * commonly provided by PHYs but not explicitly defined in the IEEE
 * 802.3 standard.
 */
struct ethtool_phy_stats {
        u64 rx_packets;
        u64 rx_bytes;
        u64 rx_errors;
        u64 tx_packets;
        u64 tx_bytes;
        u64 tx_errors;
};

Please use this if possible.

    Andrew

---
pw-bot: cr

Re: [PATCH net-next 1/3] net: phy: qcom: Add PHY counter support

[Luo Jie]

On 7/9/2025 12:31 AM, Andrew Lunn wrote:
>> +static const struct qcom_phy_hw_stat qcom_phy_hw_stats[] = {
>> +	{
>> +		.string		= "phy_rx_good_frame",
>> +		.devad		= MDIO_MMD_AN,
>> +		.cnt_31_16_reg	= QCA808X_MMD7_CNT_RX_GOOD_CRC_31_16,
>> +		.cnt_15_0_reg	= QCA808X_MMD7_CNT_RX_GOOD_CRC_15_0,
>> +	},
>> +	{
>> +		.string		= "phy_rx_bad_frame",
>> +		.devad		= MDIO_MMD_AN,
>> +		.cnt_31_16_reg	= 0xffff,
>> +		.cnt_15_0_reg	= QCA808X_MMD7_CNT_RX_BAD_CRC,
>> +	},
>> +	{
>> +		.string		= "phy_tx_good_frame",
>> +		.devad		= MDIO_MMD_AN,
>> +		.cnt_31_16_reg	= QCA808X_MMD7_CNT_TX_GOOD_CRC_31_16,
>> +		.cnt_15_0_reg	= QCA808X_MMD7_CNT_TX_GOOD_CRC_15_0,
>> +	},
>> +	{
>> +		.string		= "phy_tx_bad_frame",
>> +		.devad		= MDIO_MMD_AN,
> 
> Are there any counters which might be added later which are not in
> MDIO_MMD_AN? It seems pointless having this if it is fixed.

Yes, this structure is designed to be extended in the future to support
10G-capable PHY chip, where the counter resides in the MDIO_MMD_PCS
when the link speed is 2500 Mbps or higher. I will add a comment to the
structure to clarify this intent.

> 
>> +		.cnt_31_16_reg	= 0xffff,
>> +		.cnt_15_0_reg	= QCA808X_MMD7_CNT_TX_BAD_CRC,
>> +	},
>> +};
> 
> There has been an attempt to try to standardise PHY statistics. Please
> look at:
> 
> **
>   * struct ethtool_phy_stats - PHY-level statistics counters
>   * @rx_packets: Total successfully received frames
>   * @rx_bytes: Total successfully received bytes
>   * @rx_errors: Total received frames with errors (e.g., CRC errors)
>   * @tx_packets: Total successfully transmitted frames
>   * @tx_bytes: Total successfully transmitted bytes
>   * @tx_errors: Total transmitted frames with errors
>   *
>   * This structure provides a standardized interface for reporting
>   * PHY-level statistics counters. It is designed to expose statistics
>   * commonly provided by PHYs but not explicitly defined in the IEEE
>   * 802.3 standard.
>   */
> struct ethtool_phy_stats {
>          u64 rx_packets;
>          u64 rx_bytes;
>          u64 rx_errors;
>          u64 tx_packets;
>          u64 tx_bytes;
>          u64 tx_errors;
> };
> 
> Please use this if possible.
> 
>      Andrew

Thank you for the suggestion. I will review the standardized PHY
statistics framework and update the implementation accordingly to
ensure alignment.

> 
> ---
> pw-bot: cr

[PATCH net-next 2/3] net: phy: qcom: qca808x: Support PHY counter

[Luo Jie]

Enable CRC checking for received and transmitted frames within the
config_init() function to support counter recording, and incorporate
PHY counter operations.

Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
---
 drivers/net/phy/qcom/qca808x.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/net/phy/qcom/qca808x.c b/drivers/net/phy/qcom/qca808x.c
index 71498c518f0f..06967ce54036 100644
--- a/drivers/net/phy/qcom/qca808x.c
+++ b/drivers/net/phy/qcom/qca808x.c
@@ -243,6 +243,10 @@ static int qca808x_config_init(struct phy_device *phydev)
 
 	qca808x_fill_possible_interfaces(phydev);
 
+	ret = qcom_phy_counter_crc_check_en(phydev);
+	if (ret)
+		return ret;
+
 	/* Configure adc threshold as 100mv for the link 10M */
 	return at803x_debug_reg_mask(phydev, QCA808X_PHY_DEBUG_ADC_THRESHOLD,
 				     QCA808X_ADC_THRESHOLD_MASK,
@@ -651,6 +655,9 @@ static struct phy_driver qca808x_driver[] = {
 	.led_hw_control_set	= qca808x_led_hw_control_set,
 	.led_hw_control_get	= qca808x_led_hw_control_get,
 	.led_polarity_set	= qca808x_led_polarity_set,
+	.get_sset_count		= qcom_phy_get_sset_count,
+	.get_strings		= qcom_phy_get_strings,
+	.get_stats		= qcom_phy_get_stats,
 }, };
 
 module_phy_driver(qca808x_driver);

-- 
2.34.1

[PATCH net-next 3/3] net: phy: qcom: qca807x: Support PHY counter

[Luo Jie]

Within the QCA807X PHY operation's config_init() function, enable CRC
checking for received and transmitted frames to support counter recording,
and add PHY counter operations

Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
---
 drivers/net/phy/qcom/qca807x.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/net/phy/qcom/qca807x.c b/drivers/net/phy/qcom/qca807x.c
index 6d10ef7e9a8a..51101d009dce 100644
--- a/drivers/net/phy/qcom/qca807x.c
+++ b/drivers/net/phy/qcom/qca807x.c
@@ -768,6 +768,10 @@ static int qca807x_config_init(struct phy_device *phydev)
 			return ret;
 	}
 
+	ret = qcom_phy_counter_crc_check_en(phydev);
+	if (ret)
+		return ret;
+
 	control_dac = phy_read_mmd(phydev, MDIO_MMD_AN,
 				   QCA807X_MMD7_1000BASE_T_POWER_SAVE_PER_CABLE_LENGTH);
 	control_dac &= ~QCA807X_CONTROL_DAC_MASK;
@@ -800,6 +804,9 @@ static struct phy_driver qca807x_drivers[] = {
 		.suspend	= genphy_suspend,
 		.cable_test_start	= qca807x_cable_test_start,
 		.cable_test_get_status	= qca808x_cable_test_get_status,
+		.get_sset_count		= qcom_phy_get_sset_count,
+		.get_strings		= qcom_phy_get_strings,
+		.get_stats		= qcom_phy_get_stats,
 	},
 	{
 		PHY_ID_MATCH_EXACT(PHY_ID_QCA8075),
@@ -823,6 +830,9 @@ static struct phy_driver qca807x_drivers[] = {
 		.led_hw_is_supported = qca807x_led_hw_is_supported,
 		.led_hw_control_set = qca807x_led_hw_control_set,
 		.led_hw_control_get = qca807x_led_hw_control_get,
+		.get_sset_count		= qcom_phy_get_sset_count,
+		.get_strings		= qcom_phy_get_strings,
+		.get_stats		= qcom_phy_get_stats,
 	},
 };
 module_phy_driver(qca807x_drivers);

-- 
2.34.1