From: Maxim Levitsky <mlevitsk@redhat.com>
To: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Cc: pbonzini@redhat.com, seanjc@google.com, joro@8bytes.org,
jon.grimm@amd.com, wei.huang2@amd.com, terry.bowman@amd.com
Subject: Re: [RFCv2 PATCH 02/12] KVM: x86: lapic: Rename [GET/SET]_APIC_DEST_FIELD to [GET/SET]_XAPIC_DEST_FIELD
Date: Thu, 24 Mar 2022 12:30:03 +0200 [thread overview]
Message-ID: <0f12fa4d8aa43e6f346c1f2d73bb0b67e19bd494.camel@redhat.com> (raw)
In-Reply-To: <20220308163926.563994-3-suravee.suthikulpanit@amd.com>
On Tue, 2022-03-08 at 10:39 -0600, Suravee Suthikulpanit wrote:
> To signify that the macros only support 8-bit xAPIC destination ID.
>
> Suggested-by: Maxim Levitsky <mlevitsk@redhat.com>
> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
> ---
> arch/x86/hyperv/hv_apic.c | 2 +-
> arch/x86/include/asm/apicdef.h | 4 ++--
> arch/x86/kernel/apic/apic.c | 2 +-
> arch/x86/kernel/apic/ipi.c | 2 +-
> arch/x86/kvm/lapic.c | 2 +-
> arch/x86/kvm/svm/avic.c | 2 +-
> 6 files changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/arch/x86/hyperv/hv_apic.c b/arch/x86/hyperv/hv_apic.c
> index db2d92fb44da..fb8b2c088681 100644
> --- a/arch/x86/hyperv/hv_apic.c
> +++ b/arch/x86/hyperv/hv_apic.c
> @@ -46,7 +46,7 @@ static void hv_apic_icr_write(u32 low, u32 id)
> {
> u64 reg_val;
>
> - reg_val = SET_APIC_DEST_FIELD(id);
> + reg_val = SET_XAPIC_DEST_FIELD(id);
> reg_val = reg_val << 32;
> reg_val |= low;
>
> diff --git a/arch/x86/include/asm/apicdef.h b/arch/x86/include/asm/apicdef.h
> index 5716f22f81ac..863c2cad5872 100644
> --- a/arch/x86/include/asm/apicdef.h
> +++ b/arch/x86/include/asm/apicdef.h
> @@ -89,8 +89,8 @@
> #define APIC_DM_EXTINT 0x00700
> #define APIC_VECTOR_MASK 0x000FF
> #define APIC_ICR2 0x310
> -#define GET_APIC_DEST_FIELD(x) (((x) >> 24) & 0xFF)
> -#define SET_APIC_DEST_FIELD(x) ((x) << 24)
> +#define GET_XAPIC_DEST_FIELD(x) (((x) >> 24) & 0xFF)
> +#define SET_XAPIC_DEST_FIELD(x) ((x) << 24)
> #define APIC_LVTT 0x320
> #define APIC_LVTTHMR 0x330
> #define APIC_LVTPC 0x340
> diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
> index b70344bf6600..e6b754e43ed7 100644
> --- a/arch/x86/kernel/apic/apic.c
> +++ b/arch/x86/kernel/apic/apic.c
> @@ -275,7 +275,7 @@ void native_apic_icr_write(u32 low, u32 id)
> unsigned long flags;
>
> local_irq_save(flags);
> - apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(id));
> + apic_write(APIC_ICR2, SET_XAPIC_DEST_FIELD(id));
> apic_write(APIC_ICR, low);
> local_irq_restore(flags);
> }
> diff --git a/arch/x86/kernel/apic/ipi.c b/arch/x86/kernel/apic/ipi.c
> index d1fb874fbe64..2a6509e8c840 100644
> --- a/arch/x86/kernel/apic/ipi.c
> +++ b/arch/x86/kernel/apic/ipi.c
> @@ -99,7 +99,7 @@ void native_send_call_func_ipi(const struct cpumask *mask)
>
> static inline int __prepare_ICR2(unsigned int mask)
> {
> - return SET_APIC_DEST_FIELD(mask);
> + return SET_XAPIC_DEST_FIELD(mask);
> }
>
> static inline void __xapic_wait_icr_idle(void)
> diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
> index 9322e6340a74..03d1b6325eb8 100644
> --- a/arch/x86/kvm/lapic.c
> +++ b/arch/x86/kvm/lapic.c
> @@ -1286,7 +1286,7 @@ void kvm_apic_send_ipi(struct kvm_lapic *apic, u32 icr_low, u32 icr_high)
> if (apic_x2apic_mode(apic))
> irq.dest_id = icr_high;
> else
> - irq.dest_id = GET_APIC_DEST_FIELD(icr_high);
> + irq.dest_id = GET_XAPIC_DEST_FIELD(icr_high);
>
> trace_kvm_apic_ipi(icr_low, irq.dest_id);
>
> diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c
> index f07956f15d3b..60cd346acd1c 100644
> --- a/arch/x86/kvm/svm/avic.c
> +++ b/arch/x86/kvm/svm/avic.c
> @@ -299,7 +299,7 @@ static void avic_kick_target_vcpus(struct kvm *kvm, struct kvm_lapic *source,
> */
> kvm_for_each_vcpu(i, vcpu, kvm) {
> if (kvm_apic_match_dest(vcpu, source, icrl & APIC_SHORT_MASK,
> - GET_APIC_DEST_FIELD(icrh),
> + GET_XAPIC_DEST_FIELD(icrh),
> icrl & APIC_DEST_MASK)) {
> vcpu->arch.apic->irr_pending = true;
> svm_complete_interrupt_delivery(vcpu,
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Best regards,
Maxim Levitsky
next prev parent reply other threads:[~2022-03-24 10:30 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-08 16:39 [RFCv2 PATCH 00/12] Introducing AMD x2APIC Virtualization (x2AVIC) support Suravee Suthikulpanit
2022-03-08 16:39 ` [RFCv2 PATCH 01/12] x86/cpufeatures: Introduce x2AVIC CPUID bit Suravee Suthikulpanit
2022-03-08 16:39 ` [RFCv2 PATCH 02/12] KVM: x86: lapic: Rename [GET/SET]_APIC_DEST_FIELD to [GET/SET]_XAPIC_DEST_FIELD Suravee Suthikulpanit
2022-03-24 10:30 ` Maxim Levitsky [this message]
2022-03-08 16:39 ` [RFCv2 PATCH 03/12] KVM: SVM: Detect X2APIC virtualization (x2AVIC) support Suravee Suthikulpanit
2022-03-24 10:53 ` Maxim Levitsky
2022-03-08 16:39 ` [RFCv2 PATCH 04/12] KVM: SVM: Update max number of vCPUs supported for x2AVIC mode Suravee Suthikulpanit
2022-03-24 11:13 ` Maxim Levitsky
2022-03-08 16:39 ` [RFCv2 PATCH 05/12] KVM: SVM: Update avic_kick_target_vcpus to support 32-bit APIC ID Suravee Suthikulpanit
2022-03-24 11:36 ` Maxim Levitsky
2022-03-08 16:39 ` [RFCv2 PATCH 06/12] KVM: SVM: Do not update logical APIC ID table when in x2APIC mode Suravee Suthikulpanit
2022-03-24 11:37 ` Maxim Levitsky
2022-03-08 16:39 ` [RFCv2 PATCH 07/12] KVM: SVM: Introduce helper function kvm_get_apic_id Suravee Suthikulpanit
2022-03-24 14:14 ` Maxim Levitsky
2022-04-05 3:58 ` Suravee Suthikulpanit
2022-04-05 9:36 ` Suravee Suthikulpanit
2022-03-08 16:39 ` [RFCv2 PATCH 08/12] KVM: SVM: Adding support for configuring x2APIC MSRs interception Suravee Suthikulpanit
2022-03-24 15:19 ` Maxim Levitsky
2022-04-05 1:45 ` Suravee Suthikulpanit
2022-03-08 16:39 ` [RFCv2 PATCH 09/12] KVM: SVM: Refresh AVIC settings when changing APIC mode Suravee Suthikulpanit
2022-03-24 15:35 ` Maxim Levitsky
2022-03-31 4:04 ` Suravee Suthikulpanit
2022-03-08 16:39 ` [RFCv2 PATCH 10/12] KVM: SVM: Introduce helper functions to (de)activate AVIC and x2AVIC Suravee Suthikulpanit
2022-03-24 15:40 ` Maxim Levitsky
2022-03-08 16:39 ` [RFCv2 PATCH 11/12] KVM: SVM: Do not throw warning when calling avic_vcpu_load on a running vcpu Suravee Suthikulpanit
2022-03-24 15:42 ` Maxim Levitsky
2022-03-08 16:39 ` [RFCv2 PATCH 12/12] KVM: SVM: Do not inhibit APICv when x2APIC is present Suravee Suthikulpanit
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=0f12fa4d8aa43e6f346c1f2d73bb0b67e19bd494.camel@redhat.com \
--to=mlevitsk@redhat.com \
--cc=jon.grimm@amd.com \
--cc=joro@8bytes.org \
--cc=kvm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=pbonzini@redhat.com \
--cc=seanjc@google.com \
--cc=suravee.suthikulpanit@amd.com \
--cc=terry.bowman@amd.com \
--cc=wei.huang2@amd.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®