* [PATCH] 1/2 Add exposure of the irq delivery mask on x86
@ 2003-05-22 17:16 James Bottomley
0 siblings, 0 replies; 3+ messages in thread
From: James Bottomley @ 2003-05-22 17:16 UTC (permalink / raw)
To: Linux Kernel; +Cc: arjanv, wli
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This exposes a delivery mask in /proc/<irq>/mask for the userspace irq
balancer to use in its calculations.
The only current consumer of this on x86 would be voyager I think (patch
for voyager follows).
James
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# This is a BitKeeper generated patch for the following project:
# Project Name: Linux kernel tree
# This patch format is intended for GNU patch command version 2.5 or higher.
# This patch includes the following deltas:
# ChangeSet 1.1209 -> 1.1210
# arch/i386/kernel/irq.c 1.36 -> 1.37
# include/asm-i386/irq.h 1.9 -> 1.10
#
# The following is the BitKeeper ChangeSet Log
# --------------------------------------------
# 03/05/22 jejb@oldfenric.sc.steeleye.com 1.1210
# Add irq masks into /proc/<irq> for x86
#
# This exposes the mask both as an external variable and through the /proc
# interface. Machine specific code is still required to reflect the true
# value.
# --------------------------------------------
#
diff -Nru a/arch/i386/kernel/irq.c b/arch/i386/kernel/irq.c
--- a/arch/i386/kernel/irq.c Thu May 22 13:13:57 2003
+++ b/arch/i386/kernel/irq.c Thu May 22 13:13:57 2003
@@ -868,8 +868,20 @@
#ifdef CONFIG_SMP
static struct proc_dir_entry * smp_affinity_entry [NR_IRQS];
+static struct proc_dir_entry * smp_mask_entry [NR_IRQS];
unsigned long irq_affinity [NR_IRQS] = { [0 ... NR_IRQS-1] = ~0UL };
+unsigned long irq_mask [NR_IRQS] = { [0 ... NR_IRQS-1] = ~0UL };
+
+static int irq_mask_read_proc(char *page, char **start, off_t off,
+ int count, int *eof, void *data)
+{
+ if (count < HEX_DIGITS+1)
+ return -EINVAL;
+ return sprintf (page, "%08lx\n", irq_mask [(long)data]);
+}
+
+
static int irq_affinity_read_proc (char *page, char **start, off_t off,
int count, int *eof, void *data)
{
@@ -959,6 +971,18 @@
}
smp_affinity_entry[irq] = entry;
+
+ entry = create_proc_entry("mask", 0400, irq_dir[irq]);
+
+ if (entry) {
+ entry->nlink = 1;
+ entry->data = (void *)(long)irq;
+ entry->read_proc = irq_mask_read_proc;
+ entry->write_proc = NULL;
+ }
+
+ smp_mask_entry[irq] = entry;
+
}
#endif
}
diff -Nru a/include/asm-i386/irq.h b/include/asm-i386/irq.h
--- a/include/asm-i386/irq.h Thu May 22 13:13:57 2003
+++ b/include/asm-i386/irq.h Thu May 22 13:13:57 2003
@@ -25,6 +25,8 @@
extern void enable_irq(unsigned int);
extern void release_x86_irqs(struct task_struct *);
+extern unsigned long irq_mask [NR_IRQS];
+
#ifdef CONFIG_X86_LOCAL_APIC
#define ARCH_HAS_NMI_WATCHDOG /* See include/linux/nmi.h */
#endif
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] 1/2 Add exposure of the irq delivery mask on x86
2003-05-22 22:50 Keith Mannthey
@ 2003-05-23 0:27 ` Keith Mannthey
0 siblings, 0 replies; 3+ messages in thread
From: Keith Mannthey @ 2003-05-23 0:27 UTC (permalink / raw)
To: Keith Mannthey; +Cc: James.Bottomley, linux-kernel
On Thu, 2003-05-22 at 15:50, Keith Mannthey wrote:
> >>This exposes a delivery mask in /proc/<irq>/mask for the userspace irq
> >>balancer to use in its calculations.
>
> What exactly are you trying to expose? These patches look to just show
> what cpus are on-line. Wouldn't this just be the cpu_online_map in all
> cases? I guess I am a little confuses by what a "delivery mask" is.
>
> Thanks,
> Keith
>
Sorry I read the voyager.txt file and I understand what you are trying
to do now.
Keith
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] 1/2 Add exposure of the irq delivery mask on x86
@ 2003-05-22 22:50 Keith Mannthey
2003-05-23 0:27 ` Keith Mannthey
0 siblings, 1 reply; 3+ messages in thread
From: Keith Mannthey @ 2003-05-22 22:50 UTC (permalink / raw)
To: James.Bottomley; +Cc: linux-kernel
>>This exposes a delivery mask in /proc/<irq>/mask for the userspace irq
>>balancer to use in its calculations.
What exactly are you trying to expose? These patches look to just show
what cpus are on-line. Wouldn't this just be the cpu_online_map in all
cases? I guess I am a little confuses by what a "delivery mask" is.
Thanks,
Keith
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2003-05-23 0:12 UTC | newest]
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2003-05-22 17:16 [PATCH] 1/2 Add exposure of the irq delivery mask on x86 James Bottomley
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